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| author |   Leo Yan <leo.yan@linaro.org> | 2021-08-09 19:14:00 +0800 |
|---|---|---|
| committer |   Mathieu Poirier <mathieu.poirier@linaro.org> | 2021-10-27 11:44:36 -0600 |
| commit | 26701ceb4c2c6bfa5f8c8984fa1a1ea08fa0f02c (patch) | |
| tree | 1a6e53f4871c2945f0d165b66569a1d274a526e5 /drivers/hwtracing/coresight/coresight-tmc-etr.c | |
| parent | coresight: tmc: Configure AXI write burst size (diff) | |
| download | linux-dev-26701ceb4c2c6bfa5f8c8984fa1a1ea08fa0f02c.tar.xz linux-dev-26701ceb4c2c6bfa5f8c8984fa1a1ea08fa0f02c.zip | |
coresight: tmc-etr: Add barrier after updating AUX ring buffer
Since a memory barrier is required between AUX trace data store and
aux_head store, and the AUX trace data is filled with memcpy(), it's
sufficient to use smp_wmb() so can ensure the trace data is visible
prior to updating aux_head.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210809111407.596077-3-leo.yan@linaro.org
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-tmc-etr.c')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-tmc-etr.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 0ac2a611110b..7f4654b72314 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1564,6 +1564,14 @@ tmc_update_etr_buffer(struct coresight_device *csdev, */ if (etr_perf->snapshot) handle->head += size; + + /* + * Ensure that the AUX trace data is visible before the aux_head + * is updated via perf_aux_output_end(), as expected by the + * perf ring buffer. + */ + smp_wmb(); + out: /* * Don't set the TRUNCATED flag in snapshot mode because 1) the |