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| author |   Suzuki K Poulose <suzuki.poulose@arm.com> | 2019-08-29 14:28:30 -0600 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-09-03 22:01:15 +0200 |
| commit | f52ff9b7d64953b9a1a03faaf797d23b5c1d10d0 (patch) | |
| tree | 782486bba53e6d3f086412af536acb82a93a69a7 /drivers/hwtracing/coresight/coresight-tmc.h | |
| parent | coresight: etr_buf: Consolidate refcount initialization (diff) | |
| download | linux-dev-f52ff9b7d64953b9a1a03faaf797d23b5c1d10d0.tar.xz linux-dev-f52ff9b7d64953b9a1a03faaf797d23b5c1d10d0.zip | |
coresight: tmc-etr: Handle memory errors
We have so far ignored the memory errors, assuming that we have perfect
hardware and driver. Let us handle the memory errors reported by the
TMC ETR in status and truncate the buffer.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
[Removed ASCII smiley face from changelog]
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20190829202842.580-6-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-tmc.h')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-tmc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index 1ed50411cc3c..95d2e2747970 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -47,6 +47,7 @@ #define TMC_STS_TMCREADY_BIT 2 #define TMC_STS_FULL BIT(0) #define TMC_STS_TRIGGERED BIT(1) +#define TMC_STS_MEMERR BIT(5) /* * TMC_AXICTL - 0x110 * |