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| author |   Jan Glauber <jglauber@cavium.com> | 2016-08-24 23:25:44 +0200 |
|---|---|---|
| committer |   Wolfram Sang <wsa@the-dreams.de> | 2016-08-26 00:41:55 +0200 |
| commit | 22d40209de3bb50cbffcc6b79f2f7c5d689d185f (patch) | |
| tree | 82ca6035a1c12f5b3b4a91bfaaeae5d39a4734d4 /drivers/i2c/busses/i2c-octeon-core.h | |
| parent | i2c: octeon: Split the driver into two parts (diff) | |
| download | linux-dev-22d40209de3bb50cbffcc6b79f2f7c5d689d185f.tar.xz linux-dev-22d40209de3bb50cbffcc6b79f2f7c5d689d185f.zip | |
i2c: thunderx: Add i2c driver for ThunderX SOC
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI, interrupts are MSI-X. The
clock rates can be set via device tree or ACPI.
Signed-off-by: Jan Glauber <jglauber@cavium.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c/busses/i2c-octeon-core.h')
| -rw-r--r-- | drivers/i2c/busses/i2c-octeon-core.h | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/drivers/i2c/busses/i2c-octeon-core.h b/drivers/i2c/busses/i2c-octeon-core.h index 81c6a81cd308..33c7e1fb178c 100644 --- a/drivers/i2c/busses/i2c-octeon-core.h +++ b/drivers/i2c/busses/i2c-octeon-core.h @@ -8,9 +8,15 @@ #include <linux/pci.h> /* Register offsets */ -#define SW_TWSI 0x00 -#define TWSI_INT 0x10 -#define SW_TWSI_EXT 0x18 +#if IS_ENABLED(CONFIG_I2C_THUNDERX) + #define SW_TWSI 0x1000 + #define TWSI_INT 0x1010 + #define SW_TWSI_EXT 0x1018 +#else + #define SW_TWSI 0x00 + #define TWSI_INT 0x10 + #define SW_TWSI_EXT 0x18 +#endif /* Controller command patterns */ #define SW_TWSI_V BIT_ULL(63) /* Valid bit */ @@ -94,6 +100,7 @@ struct octeon_i2c { wait_queue_head_t queue; struct i2c_adapter adap; + struct clk *clk; int irq; int hlc_irq; /* For cn7890 only */ u32 twsi_freq; @@ -109,6 +116,9 @@ struct octeon_i2c { void (*hlc_int_disable)(struct octeon_i2c *); atomic_t int_enable_cnt; atomic_t hlc_int_enable_cnt; +#if IS_ENABLED(CONFIG_I2C_THUNDERX) + struct msix_entry i2c_msix; +#endif }; static inline void octeon_i2c_writeq_flush(u64 val, void __iomem *addr) |