diff options
| author |   Dmitry Osipenko <digetx@gmail.com> | 2020-01-14 04:34:40 +0300 |
|---|---|---|
| committer |   Wolfram Sang <wsa@the-dreams.de> | 2020-01-15 18:32:22 +0100 |
| commit | 4211ffc3ad15a091966cd7be7889fbe4562cd215 (patch) | |
| tree | a9dc5e620b18d1be0f5c05589b3f6da379df6ecd /drivers/i2c | |
| parent | i2c: tegra: Rename I2C_PIO_MODE_MAX_LEN to I2C_PIO_MODE_PREFERRED_LEN (diff) | |
| download | linux-dev-4211ffc3ad15a091966cd7be7889fbe4562cd215.tar.xz linux-dev-4211ffc3ad15a091966cd7be7889fbe4562cd215.zip | |
i2c: tegra: Use relaxed versions of readl/writel
There is nothing to synchronize in regards to memory accesses for PIO
transfers and for DMA transfers the DMA API takes care of the syncing.
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c')
| -rw-r--r-- | drivers/i2c/busses/i2c-tegra.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index e0eb8f5dcd6b..1a390e1bff72 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -284,12 +284,12 @@ struct tegra_i2c_dev { static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned long reg) { - writel(val, i2c_dev->base + reg); + writel_relaxed(val, i2c_dev->base + reg); } static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg) { - return readl(i2c_dev->base + reg); + return readl_relaxed(i2c_dev->base + reg); } /* @@ -307,16 +307,16 @@ static unsigned long tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev, static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned long reg) { - writel(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); + writel_relaxed(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); /* Read back register to make sure that register writes completed */ if (reg != I2C_TX_FIFO) - readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); + readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); } static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg) { - return readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); + return readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); } static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data, @@ -689,12 +689,13 @@ static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev) i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD); if (i2c_dev->is_curr_atomic_xfer) - err = readl_poll_timeout_atomic(addr, val, val == 0, - 1000, - I2C_CONFIG_LOAD_TIMEOUT); + err = readl_relaxed_poll_timeout_atomic( + addr, val, val == 0, 1000, + I2C_CONFIG_LOAD_TIMEOUT); else - err = readl_poll_timeout(addr, val, val == 0, 1000, - I2C_CONFIG_LOAD_TIMEOUT); + err = readl_relaxed_poll_timeout( + addr, val, val == 0, 1000, + I2C_CONFIG_LOAD_TIMEOUT); if (err) { dev_warn(i2c_dev->dev, |