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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-07-23 20:54:31 -0700
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-07-23 20:54:31 -0700
commit055655a9f0fefef2256310a128a4cdaff8b8c432 (patch)
tree2f7371e23c2aab9cf5134b372a0c4bdf673ed16d /drivers/iio/accel/st_accel_core.c
parentLinux 4.13-rc2 (diff)
parentiio: aspeed-adc: wait for initial sequence. (diff)
downloadlinux-dev-055655a9f0fefef2256310a128a4cdaff8b8c432.tar.xz
linux-dev-055655a9f0fefef2256310a128a4cdaff8b8c432.zip
Merge tag 'iio-fixes-for-4.13a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus
Jonathan writes: First set of IIO fixes for the 4.13 cycle. * ad2s1210 - Fix negative angular velocity reads (identified by a gcc 7 warning) * aspeed-adc - Wait for initialization sequence to finish before enabling channels. Without it no channels work. * axp288 - Revert a patch that dropped some bogus register mods. No one is entirely sure why but it breaks charging on some devices. - Fix GPADC pin read returning 0. Turns out a small sleep is needed. * bmc150 - Make sure device is restored to normal state after suspend / resume cycle. Otherwise, simple sysfs reads are broken. * tsl2563 - fix wrong event code. * st-accel - add spi 3-wire support. Needed to fix the lsm303agr accelerometer which only had 3 wires in all cases. Side effect is to enable optional 3-wire support for other devices. * st-pressure - disable multiread by default for LPS22HB (only effects SPI) * sun4i-gpadc-iio - fix unbalanced irq enable / disable * vf610 - Fix VALT slection for REFSEL bits - ensures we are using the right reference pins.
Diffstat (limited to 'drivers/iio/accel/st_accel_core.c')
-rw-r--r--drivers/iio/accel/st_accel_core.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/iio/accel/st_accel_core.c b/drivers/iio/accel/st_accel_core.c
index 07d1489cd457..e44f62bf9caa 100644
--- a/drivers/iio/accel/st_accel_core.c
+++ b/drivers/iio/accel/st_accel_core.c
@@ -166,6 +166,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
.mask_ihl = 0x02,
.addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
},
+ .sim = {
+ .addr = 0x23,
+ .value = BIT(0),
+ },
.multi_read_bit = true,
.bootime = 2,
},
@@ -234,6 +238,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
.mask_od = 0x40,
.addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
},
+ .sim = {
+ .addr = 0x23,
+ .value = BIT(0),
+ },
.multi_read_bit = true,
.bootime = 2,
},
@@ -316,6 +324,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
.en_mask = 0x08,
},
},
+ .sim = {
+ .addr = 0x24,
+ .value = BIT(0),
+ },
.multi_read_bit = false,
.bootime = 2,
},
@@ -379,6 +391,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
.mask_int1 = 0x04,
.addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
},
+ .sim = {
+ .addr = 0x21,
+ .value = BIT(1),
+ },
.multi_read_bit = true,
.bootime = 2, /* guess */
},
@@ -437,6 +453,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
.mask_od = 0x40,
.addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
},
+ .sim = {
+ .addr = 0x21,
+ .value = BIT(7),
+ },
.multi_read_bit = false,
.bootime = 2, /* guess */
},
@@ -499,6 +519,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
.addr_ihl = 0x22,
.mask_ihl = 0x80,
},
+ .sim = {
+ .addr = 0x23,
+ .value = BIT(0),
+ },
.multi_read_bit = true,
.bootime = 2,
},
@@ -547,6 +571,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
.mask_int1 = 0x04,
.addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
},
+ .sim = {
+ .addr = 0x21,
+ .value = BIT(1),
+ },
.multi_read_bit = false,
.bootime = 2,
},
@@ -614,6 +642,10 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
.mask_ihl = 0x02,
.addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
},
+ .sim = {
+ .addr = 0x23,
+ .value = BIT(0),
+ },
.multi_read_bit = true,
.bootime = 2,
},