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authorFabrice Gasnier <fabrice.gasnier@st.com>2019-03-21 17:47:22 +0100
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2019-04-04 20:20:32 +0100
commit2e19ba661ece580b23115f7eff1e5fad25317172 (patch)
tree69286b366246f5ff954eabc6f47eea1b9c2bf389 /drivers/iio/adc
parentstaging: iio: ad5933: change attributes to match ABI (diff)
downloadlinux-dev-2e19ba661ece580b23115f7eff1e5fad25317172.tar.xz
linux-dev-2e19ba661ece580b23115f7eff1e5fad25317172.zip
iio: adc: stm32-dfsdm: make spi_master_freq more accurate
Current ckout divider may be set to a value that makes ckout to exceed spi-max-frequency. Rather use lower value (e.g. round up divider when ckout isn't accurate). Also when the SPI clock isn't accurate, 'spi_master_freq' is filled in with expected frequency. Use computed value instead to be more accurate: - e.g. source clock / (CKOUTDIV + 1) Enforce checks on the divider: ckoutdiv range can be from 1-255 to provide divider of 2-256. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/adc')
-rw-r--r--drivers/iio/adc/stm32-dfsdm-core.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/drivers/iio/adc/stm32-dfsdm-core.c b/drivers/iio/adc/stm32-dfsdm-core.c
index bf089f5d6225..472b809ebf94 100644
--- a/drivers/iio/adc/stm32-dfsdm-core.c
+++ b/drivers/iio/adc/stm32-dfsdm-core.c
@@ -199,7 +199,7 @@ static int stm32_dfsdm_parse_of(struct platform_device *pdev,
{
struct device_node *node = pdev->dev.of_node;
struct resource *res;
- unsigned long clk_freq;
+ unsigned long clk_freq, divider;
unsigned int spi_freq, rem;
int ret;
@@ -243,13 +243,20 @@ static int stm32_dfsdm_parse_of(struct platform_device *pdev,
return 0;
}
- priv->spi_clk_out_div = div_u64_rem(clk_freq, spi_freq, &rem) - 1;
- if (!priv->spi_clk_out_div) {
- /* spi_clk_out_div == 0 means ckout is OFF */
+ divider = div_u64_rem(clk_freq, spi_freq, &rem);
+ /* Round up divider when ckout isn't precise, not to exceed spi_freq */
+ if (rem)
+ divider++;
+
+ /* programmable divider is in range of [2:256] */
+ if (divider < 2 || divider > 256) {
dev_err(&pdev->dev, "spi-max-frequency not achievable\n");
return -EINVAL;
}
- priv->dfsdm.spi_master_freq = spi_freq;
+
+ /* SPI clock output divider is: divider = CKOUTDIV + 1 */
+ priv->spi_clk_out_div = divider - 1;
+ priv->dfsdm.spi_master_freq = clk_freq / (priv->spi_clk_out_div + 1);
if (rem) {
dev_warn(&pdev->dev, "SPI clock not accurate\n");