diff options
| author |   Simon Xue <xxm@rock-chips.com> | 2021-07-12 09:45:07 +0800 |
|---|---|---|
| committer |   Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2021-07-17 18:03:39 +0100 |
| commit | 7786da3b5ae167c17f35e22ba35e06006338c2f6 (patch) | |
| tree | f82e645316c05462619b78736ab98d036108ea14 /drivers/iio/adc | |
| parent | dt-bindings: iio: adc: rockchip-saradc: add description for rk3568 (diff) | |
| download | linux-dev-7786da3b5ae167c17f35e22ba35e06006338c2f6.tar.xz linux-dev-7786da3b5ae167c17f35e22ba35e06006338c2f6.zip | |
iio: adc: rockchip_saradc: add support for rk3568 saradc
It is similar to other devices, but with 8 channels.
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20210712014507.97477-1-xxm@rock-chips.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/adc')
| -rw-r--r-- | drivers/iio/adc/rockchip_saradc.c | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 12584f1631d8..f3eb8d2e50dc 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -35,7 +35,7 @@ #define SARADC_DLY_PU_SOC_MASK 0x3f #define SARADC_TIMEOUT msecs_to_jiffies(100) -#define SARADC_MAX_CHANNELS 6 +#define SARADC_MAX_CHANNELS 8 struct rockchip_saradc_data { const struct iio_chan_spec *channels; @@ -192,6 +192,23 @@ static const struct rockchip_saradc_data rk3399_saradc_data = { .clk_rate = 1000000, }; +static const struct iio_chan_spec rockchip_rk3568_saradc_iio_channels[] = { + SARADC_CHANNEL(0, "adc0", 10), + SARADC_CHANNEL(1, "adc1", 10), + SARADC_CHANNEL(2, "adc2", 10), + SARADC_CHANNEL(3, "adc3", 10), + SARADC_CHANNEL(4, "adc4", 10), + SARADC_CHANNEL(5, "adc5", 10), + SARADC_CHANNEL(6, "adc6", 10), + SARADC_CHANNEL(7, "adc7", 10), +}; + +static const struct rockchip_saradc_data rk3568_saradc_data = { + .channels = rockchip_rk3568_saradc_iio_channels, + .num_channels = ARRAY_SIZE(rockchip_rk3568_saradc_iio_channels), + .clk_rate = 1000000, +}; + static const struct of_device_id rockchip_saradc_match[] = { { .compatible = "rockchip,saradc", @@ -202,6 +219,9 @@ static const struct of_device_id rockchip_saradc_match[] = { }, { .compatible = "rockchip,rk3399-saradc", .data = &rk3399_saradc_data, + }, { + .compatible = "rockchip,rk3568-saradc", + .data = &rk3568_saradc_data, }, {}, }; |