diff options
| author |   Nuno Sa <nuno.sa@analog.com> | 2021-04-27 10:54:53 +0200 |
|---|---|---|
| committer |   Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2021-05-17 13:49:09 +0100 |
| commit | 256e69ab96934486a9da1c251d276134fdf61e32 (patch) | |
| tree | 9f4c8cf71a204786e24085a1b66da6142f623110 /drivers/iio/imu | |
| parent | iio: adis: add burst_max_speed_hz variable (diff) | |
| download | linux-dev-256e69ab96934486a9da1c251d276134fdf61e32.tar.xz linux-dev-256e69ab96934486a9da1c251d276134fdf61e32.zip | |
iio: adis16475: do not directly change spi 'max_speed_hz'
With commit 3ba10e37371d ("iio: adis: add burst_max_speed_hz variable"), we
just need to define 'burst_max_speed_hz' and the adis core will take
care of setting up the spi transfers for burst mode. Hence, we fix
a potential race with the spi core where we could be left with an
invalid 'max_speed_hz'.
Reviewed-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Fixes: fff7352bf7a3c ("iio: imu: Add support for adis16475")
Signed-off-by: Nuno Sa <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20210427085454.30616-6-nuno.sa@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/imu')
| -rw-r--r-- | drivers/iio/imu/adis16475.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/iio/imu/adis16475.c b/drivers/iio/imu/adis16475.c index 51b76444db0b..5654c0c15426 100644 --- a/drivers/iio/imu/adis16475.c +++ b/drivers/iio/imu/adis16475.c @@ -645,7 +645,8 @@ static int adis16475_enable_irq(struct adis *adis, bool enable) .timeouts = (_timeouts), \ .burst_reg_cmd = ADIS16475_REG_GLOB_CMD, \ .burst_len = ADIS16475_BURST_MAX_DATA, \ - .burst_max_len = ADIS16475_BURST32_MAX_DATA \ + .burst_max_len = ADIS16475_BURST32_MAX_DATA, \ + .burst_max_speed_hz = ADIS16475_BURST_MAX_SPEED \ } static const struct adis16475_sync adis16475_sync_mode[] = { @@ -1062,15 +1063,11 @@ static irqreturn_t adis16475_trigger_handler(int irq, void *p) bool valid; /* offset until the first element after gyro and accel */ const u8 offset = st->burst32 ? 13 : 7; - const u32 cached_spi_speed_hz = adis->spi->max_speed_hz; - - adis->spi->max_speed_hz = ADIS16475_BURST_MAX_SPEED; ret = spi_sync(adis->spi, &adis->msg); if (ret) goto check_burst32; - adis->spi->max_speed_hz = cached_spi_speed_hz; buffer = adis->buffer; crc = be16_to_cpu(buffer[offset + 2]); |