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authorJason Gunthorpe <jgg@nvidia.com>2020-09-18 09:42:21 -0300
committerJason Gunthorpe <jgg@nvidia.com>2020-09-18 10:31:45 -0300
commita1255fff5d9066f9f3c761cba258b75d49bd8750 (patch)
tree0bf0babb72d5d0ef984a4a7723c78544a739334c /drivers/infiniband/hw/cxgb4/cm.c
parentMerge branch 'mlx5_active_speed' into rdma.git for-next (diff)
parentRDMA/mlx5: Expose TIR and QP ICM address for sw_owner_v2 devices (diff)
downloadlinux-dev-a1255fff5d9066f9f3c761cba258b75d49bd8750.tar.xz
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Merge branch 'mlx_sw_owner_v2' into rdma.git for-next
Leon Romanovsky says: ==================== This series from Alex extends software steering interface to support devices with extra capability "sw_owner_2" which will replace existing "sw_owner". ==================== Based on the mlx5-next branch at git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux due to dependencies. * branch 'mlx5_sw_owner_v2: RDMA/mlx5: Expose TIR and QP ICM address for sw_owner_v2 devices RDMA/mlx5: Allow DM allocation for sw_owner_v2 enabled devices RDMA/mlx5: Add sw_owner_v2 bit capability
Diffstat (limited to 'drivers/infiniband/hw/cxgb4/cm.c')
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