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authorSagi Grimberg <sagig@mellanox.com>2014-02-23 14:19:11 +0200
committerRoland Dreier <roland@purestorage.com>2014-03-07 11:39:51 -0800
commite6631814fb3ac454fbbf47ea343c2b9508e4e1ba (patch)
treedfe554c9fbe5f3f4f0a37276a74180bf2f4e9fd2 /drivers/infiniband/hw/mlx5/cq.c
parentIB/mlx5: Keep mlx5 MRs in a radix tree under device (diff)
downloadlinux-dev-e6631814fb3ac454fbbf47ea343c2b9508e4e1ba.tar.xz
linux-dev-e6631814fb3ac454fbbf47ea343c2b9508e4e1ba.zip
IB/mlx5: Support IB_WR_REG_SIG_MR
This patch implements IB_WR_REG_SIG_MR posted by the user. Baisically this WR involves 3 WQEs in order to prepare and properly register the signature layout: 1. post UMR WR to register the sig_mr in one of two possible ways: * In case the user registered a single MR for data so the UMR data segment consists of: - single klm (data MR) passed by the user - BSF with signature attributes requested by the user. * In case the user registered 2 MRs, one for data and one for protection, the UMR consists of: - strided block format which includes data and protection MRs and their repetitive block format. - BSF with signature attributes requested by the user. 2. post SET_PSV in order to set the memory domain initial signature parameters passed by the user. SET_PSV is not signaled and solicited CQE. 3. post SET_PSV in order to set the wire domain initial signature parameters passed by the user. SET_PSV is not signaled and solicited CQE. * After this compound WR we place a small fence for next WR to come. This patch also introduces some helper functions to set the BSF correctly and determining the signature format selectors. Signed-off-by: Sagi Grimberg <sagig@mellanox.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
Diffstat (limited to 'drivers/infiniband/hw/mlx5/cq.c')
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