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authorRoland Dreier <roland@topspin.com>2005-04-16 15:26:32 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:26:32 -0700
commitd10ddbf6d7f6699c386d1f41bf542189de32b6be (patch)
treeb2e3ab95925407472fa9c62bb6016d85f822cb68 /drivers/infiniband/hw/mthca/mthca_eq.c
parent[PATCH] IB/mthca: tweaks to mthca_cmd.c (diff)
downloadlinux-dev-d10ddbf6d7f6699c386d1f41bf542189de32b6be.tar.xz
linux-dev-d10ddbf6d7f6699c386d1f41bf542189de32b6be.zip
[PATCH] IB/mthca: encapsulate mem-free check into mthca_is_memfree()
Clean up mem-free mode support by introducing mthca_is_memfree() function, which encapsulates the logic of deciding if a device is mem-free. Signed-off-by: Roland Dreier <roland@topspin.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/infiniband/hw/mthca/mthca_eq.c')
-rw-r--r--drivers/infiniband/hw/mthca/mthca_eq.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_eq.c b/drivers/infiniband/hw/mthca/mthca_eq.c
index b6f2a46fc84b..f46d615d396f 100644
--- a/drivers/infiniband/hw/mthca/mthca_eq.c
+++ b/drivers/infiniband/hw/mthca/mthca_eq.c
@@ -198,7 +198,7 @@ static inline void arbel_set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u
static inline void set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u32 ci)
{
- if (dev->hca_type == ARBEL_NATIVE)
+ if (mthca_is_memfree(dev))
arbel_set_eq_ci(dev, eq, ci);
else
tavor_set_eq_ci(dev, eq, ci);
@@ -223,7 +223,7 @@ static inline void arbel_eq_req_not(struct mthca_dev *dev, u32 eqn_mask)
static inline void disarm_cq(struct mthca_dev *dev, int eqn, int cqn)
{
- if (dev->hca_type != ARBEL_NATIVE) {
+ if (!mthca_is_memfree(dev)) {
u32 doorbell[2];
doorbell[0] = cpu_to_be32(MTHCA_EQ_DB_DISARM_CQ | eqn);
@@ -535,11 +535,11 @@ static int __devinit mthca_create_eq(struct mthca_dev *dev,
MTHCA_EQ_OWNER_HW |
MTHCA_EQ_STATE_ARMED |
MTHCA_EQ_FLAG_TR);
- if (dev->hca_type == ARBEL_NATIVE)
+ if (mthca_is_memfree(dev))
eq_context->flags |= cpu_to_be32(MTHCA_EQ_STATE_ARBEL);
eq_context->logsize_usrpage = cpu_to_be32((ffs(nent) - 1) << 24);
- if (dev->hca_type == ARBEL_NATIVE) {
+ if (mthca_is_memfree(dev)) {
eq_context->arbel_pd = cpu_to_be32(dev->driver_pd.pd_num);
} else {
eq_context->logsize_usrpage |= cpu_to_be32(dev->driver_uar.index);
@@ -686,7 +686,7 @@ static int __devinit mthca_map_eq_regs(struct mthca_dev *dev)
mthca_base = pci_resource_start(dev->pdev, 0);
- if (dev->hca_type == ARBEL_NATIVE) {
+ if (mthca_is_memfree(dev)) {
/*
* We assume that the EQ arm and EQ set CI registers
* fall within the first BAR. We can't trust the
@@ -756,7 +756,7 @@ static int __devinit mthca_map_eq_regs(struct mthca_dev *dev)
static void __devexit mthca_unmap_eq_regs(struct mthca_dev *dev)
{
- if (dev->hca_type == ARBEL_NATIVE) {
+ if (mthca_is_memfree(dev)) {
mthca_unmap_reg(dev, (pci_resource_len(dev->pdev, 0) - 1) &
dev->fw.arbel.eq_set_ci_base,
MTHCA_EQ_SET_CI_SIZE,
@@ -880,7 +880,7 @@ int __devinit mthca_init_eq_table(struct mthca_dev *dev)
for (i = 0; i < MTHCA_NUM_EQ; ++i) {
err = request_irq(dev->eq_table.eq[i].msi_x_vector,
- dev->hca_type == ARBEL_NATIVE ?
+ mthca_is_memfree(dev) ?
mthca_arbel_msi_x_interrupt :
mthca_tavor_msi_x_interrupt,
0, eq_name[i], dev->eq_table.eq + i);
@@ -890,7 +890,7 @@ int __devinit mthca_init_eq_table(struct mthca_dev *dev)
}
} else {
err = request_irq(dev->pdev->irq,
- dev->hca_type == ARBEL_NATIVE ?
+ mthca_is_memfree(dev) ?
mthca_arbel_interrupt :
mthca_tavor_interrupt,
SA_SHIRQ, DRV_NAME, dev);
@@ -918,7 +918,7 @@ int __devinit mthca_init_eq_table(struct mthca_dev *dev)
dev->eq_table.eq[MTHCA_EQ_CMD].eqn, status);
for (i = 0; i < MTHCA_EQ_CMD; ++i)
- if (dev->hca_type == ARBEL_NATIVE)
+ if (mthca_is_memfree(dev))
arbel_eq_req_not(dev, dev->eq_table.eq[i].eqn_mask);
else
tavor_eq_req_not(dev, dev->eq_table.eq[i].eqn);