diff options
| author |   Mike Marciniszyn <mike.marciniszyn@intel.com> | 2014-03-07 08:40:49 -0500 |
|---|---|---|
| committer |   Roland Dreier <roland@purestorage.com> | 2014-03-17 16:16:51 -0700 |
| commit | 1ed88dd7d0b361e677b2690f573e5c274bb25c87 (patch) | |
| tree | d78f5aa8f9983b92b7db9f876817199b136c3a2b /drivers/infiniband/hw/qib/qib_iba7220.c | |
| parent | IB/qib: Fix debugfs ordering issue with multiple HCAs (diff) | |
| download | linux-dev-1ed88dd7d0b361e677b2690f573e5c274bb25c87.tar.xz linux-dev-1ed88dd7d0b361e677b2690f573e5c274bb25c87.zip | |
IB/qib: Add percpu counter replacing qib_devdata int_counter
This patch replaces the dd->int_counter with a percpu counter.
The maintanance of qib_stats.sps_ints and int_counter are
combined into the new counter.
There are two new functions added to read the counter:
- qib_int_counter (for a particular qib_devdata)
- qib_sps_ints (for all HCAs)
A z_int_counter is added to allow the interrupt detection logic
to determine if interrupts have occured since z_int_counter
was "reset".
Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
Diffstat (limited to 'drivers/infiniband/hw/qib/qib_iba7220.c')
| -rw-r--r-- | drivers/infiniband/hw/qib/qib_iba7220.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/infiniband/hw/qib/qib_iba7220.c b/drivers/infiniband/hw/qib/qib_iba7220.c index 454c2e7668fe..28063d4c225b 100644 --- a/drivers/infiniband/hw/qib/qib_iba7220.c +++ b/drivers/infiniband/hw/qib/qib_iba7220.c @@ -1962,10 +1962,7 @@ static irqreturn_t qib_7220intr(int irq, void *data) goto bail; } - qib_stats.sps_ints++; - if (dd->int_counter != (u32) -1) - dd->int_counter++; - + this_cpu_inc(*dd->int_counter); if (unlikely(istat & (~QLOGIC_IB_I_BITSEXTANT | QLOGIC_IB_I_GPIO | QLOGIC_IB_I_ERROR))) unlikely_7220_intr(dd, istat); @@ -2120,7 +2117,8 @@ static int qib_setup_7220_reset(struct qib_devdata *dd) * isn't set. */ dd->flags &= ~(QIB_INITTED | QIB_PRESENT); - dd->int_counter = 0; /* so we check interrupts work again */ + /* so we check interrupts work again */ + dd->z_int_counter = qib_int_counter(dd); val = dd->control | QLOGIC_IB_C_RESET; writeq(val, &dd->kregbase[kr_control]); mb(); /* prevent compiler reordering around actual reset */ |