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authorTom Murphy <murphyt7@tcd.ie>2019-09-08 09:56:37 -0700
committerJoerg Roedel <jroedel@suse.de>2019-10-15 11:31:03 +0200
commit37ec8eb851c1876580a963f283fe7496592b9f72 (patch)
tree6435fe81d85d41a8e193bb6c26a58cb35fc45a33 /drivers/iommu/amd_iommu_types.h
parentLinux 5.4-rc3 (diff)
downloadlinux-dev-37ec8eb851c1876580a963f283fe7496592b9f72.tar.xz
linux-dev-37ec8eb851c1876580a963f283fe7496592b9f72.zip
iommu/amd: Remove unnecessary locking from AMD iommu driver
With or without locking it doesn't make sense for two writers to be writing to the same IOVA range at the same time. Even with locking we still have a race condition, whoever gets the lock first, so we still can't be sure what the result will be. With locking the result will be more sane, it will be correct for the last writer, but still useless because we can't be sure which writer will get the lock last. It's a fundamentally broken design to have two writers writing to the same IOVA range at the same time. So we can remove the locking and work on the assumption that no two writers will be writing to the same IOVA range at the same time. The only exception is when we have to allocate a middle page in the page tables, the middle page can cover more than just the IOVA range a writer has been allocated. However this isn't an issue in the AMD driver because it can atomically allocate middle pages using "cmpxchg64()". Signed-off-by: Tom Murphy <murphyt7@tcd.ie> Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/amd_iommu_types.h')
-rw-r--r--drivers/iommu/amd_iommu_types.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
index c9c1612d52e0..becbd3bd9180 100644
--- a/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@ -468,7 +468,6 @@ struct protection_domain {
struct iommu_domain domain; /* generic domain handle used by
iommu core code */
spinlock_t lock; /* mostly used to lock the page table*/
- struct mutex api_lock; /* protect page tables in the iommu-api path */
u16 id; /* the domain id written to the device table */
int mode; /* paging mode (0-6 levels) */
u64 *pt_root; /* page table root pointer */