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| author |   Zhen Lei <thunder.leizhen@huawei.com> | 2015-07-07 04:30:17 +0100 |
|---|---|---|
| committer |   Will Deacon <will.deacon@arm.com> | 2015-07-08 17:24:39 +0100 |
| commit | e2f4c2330f08ba73d9a3c919a3d6ca33dce7d2c2 (patch) | |
| tree | 959c14ce9b8e53ca73aba64a8f46f8ccd9965e58 /drivers/iommu/arm-smmu-v3.c | |
| parent | iommu/arm-smmu: Fix the values of ARM64_TCR_{I,O}RGN0_SHIFT (diff) | |
| download | linux-dev-e2f4c2330f08ba73d9a3c919a3d6ca33dce7d2c2.tar.xz linux-dev-e2f4c2330f08ba73d9a3c919a3d6ca33dce7d2c2.zip | |
iommu/arm-smmu: Enlarge STRTAB_L1_SZ_SHIFT to support larger sidsize
Because we will choose the minimum value between STRTAB_L1_SZ_SHIFT and
IDR1.SIDSIZE, so enlarge STRTAB_L1_SZ_SHIFT will not impact the platforms
whose IDR1.SIDSIZE is smaller than old STRTAB_L1_SZ_SHIFT value.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/iommu/arm-smmu-v3.c')
| -rw-r--r-- | drivers/iommu/arm-smmu-v3.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 98e987a3ed3a..29cba3280af7 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -199,9 +199,10 @@ * Stream table. * * Linear: Enough to cover 1 << IDR1.SIDSIZE entries - * 2lvl: 8k L1 entries, 256 lazy entries per table (each table covers a PCI bus) + * 2lvl: 128k L1 entries, + * 256 lazy entries per table (each table covers a PCI bus) */ -#define STRTAB_L1_SZ_SHIFT 16 +#define STRTAB_L1_SZ_SHIFT 20 #define STRTAB_SPLIT 8 #define STRTAB_L1_DESC_DWORDS 1 |