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authorPrem Mallappa <pmallapp@broadcom.com>2015-12-14 22:01:23 +0530
committerWill Deacon <will.deacon@arm.com>2015-12-17 12:05:36 +0000
commit6380be0535fd60c0a346ec0ae447f0f6c9e3ea83 (patch)
treea9b38e990c01fd0f29fea30f5c215ec499d0d8a0 /drivers/iommu/io-pgtable-arm.c
parentiommu/arm-smmu: Fix write to GERRORN register (diff)
downloadlinux-dev-6380be0535fd60c0a346ec0ae447f0f6c9e3ea83.tar.xz
linux-dev-6380be0535fd60c0a346ec0ae447f0f6c9e3ea83.zip
iommu/arm-smmu: Use STE.S1STALLD only when supported
It is ILLEGAL to set STE.S1STALLD to 1 if stage 1 is enabled and either the stall or terminate models are not supported. This patch fixes the STALLD check and ensures that we don't set STALLD in the STE when it is not supported. Signed-off-by: Prem Mallappa <pmallapp@broadcom.com> [will: consistently use IDR0_STALL_MODEL_* prefix] Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/iommu/io-pgtable-arm.c')
0 files changed, 0 insertions, 0 deletions