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author | Will Deacon <will@kernel.org> | 2020-01-10 12:22:16 +0000 |
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committer | Will Deacon <will@kernel.org> | 2020-01-10 15:52:24 +0000 |
commit | 6f932ad369a3c3f853ffc5d93de9a73420e862b1 (patch) | |
tree | 5b148da842f0e636f939e4e4c803654ac8351d22 /drivers/iommu/qcom_iommu.c | |
parent | iommu/io-pgtable-arm: Improve attribute handling (diff) | |
download | linux-dev-6f932ad369a3c3f853ffc5d93de9a73420e862b1.tar.xz linux-dev-6f932ad369a3c3f853ffc5d93de9a73420e862b1.zip |
iommu/io-pgtable-arm: Ensure ARM_64_LPAE_S2_TCR_RES1 is unsigned
ARM_64_LPAE_S2_TCR_RES1 is intended to map to bit 31 of the VTCR register,
which is required to be set to 1 by the architecture. Unfortunately, we
accidentally treat this as a signed quantity which means we also set the
upper 32 bits of the VTCR to one, and they are required to be zero.
Treat ARM_64_LPAE_S2_TCR_RES1 as unsigned to avoid the unwanted
sign-extension up to 64 bits.
Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/iommu/qcom_iommu.c')
0 files changed, 0 insertions, 0 deletions