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| author |   Nicolin Chen <nicoleotsuka@gmail.com> | 2020-09-17 04:31:54 -0700 |
|---|---|---|
| committer |   Joerg Roedel <jroedel@suse.de> | 2020-09-18 11:07:06 +0200 |
| commit | d5c152c3409ac1982a9277d8d344e073eda17e78 (patch) | |
| tree | 2d5daacfcb5e7679880e4dc05bba21260fecc3a7 /drivers/iommu | |
| parent | iommu/tegra-smmu: Add locking around mapping operations (diff) | |
| download | linux-dev-d5c152c3409ac1982a9277d8d344e073eda17e78.tar.xz linux-dev-d5c152c3409ac1982a9277d8d344e073eda17e78.zip | |
iommu/tegra-smmu: Fix tlb_mask
The "num_tlb_lines" might not be a power-of-2 value, being 48 on
Tegra210 for example. So the current way of calculating tlb_mask
using the num_tlb_lines is not correct: tlb_mask=0x5f in case of
num_tlb_lines=48, which will trim a setting of 0x30 (48) to 0x10.
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200917113155.13438-2-nicoleotsuka@gmail.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu')
| -rw-r--r-- | drivers/iommu/tegra-smmu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index 046add7acb61..9bfff94ca348 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -1111,7 +1111,7 @@ struct tegra_smmu *tegra_smmu_probe(struct device *dev, smmu->pfn_mask = BIT_MASK(mc->soc->num_address_bits - PAGE_SHIFT) - 1; dev_dbg(dev, "address bits: %u, PFN mask: %#lx\n", mc->soc->num_address_bits, smmu->pfn_mask); - smmu->tlb_mask = (smmu->soc->num_tlb_lines << 1) - 1; + smmu->tlb_mask = (1 << fls(smmu->soc->num_tlb_lines)) - 1; dev_dbg(dev, "TLB lines: %u, mask: %#lx\n", smmu->soc->num_tlb_lines, smmu->tlb_mask); |