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| author |   Christoph Hellwig <hch@lst.de> | 2018-07-26 16:27:00 +0200 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@sifive.com> | 2018-08-13 08:31:32 -0700 |
| commit | 8237f8bc4f6eb7e5ce2a19276079cfd3a7c6314a (patch) | |
| tree | 68c054430cfba76983a2d0e3db12a7d563d72230 /drivers/irqchip/Kconfig | |
| parent | RISC-V: Add the directive for alignment of stvec's value (diff) | |
| download | linux-dev-8237f8bc4f6eb7e5ce2a19276079cfd3a7c6314a.tar.xz linux-dev-8237f8bc4f6eb7e5ce2a19276079cfd3a7c6314a.zip | |
irqchip: add a SiFive PLIC driver
Add a driver for the SiFive implementation of the RISC-V Platform Level
Interrupt Controller (PLIC). The PLIC connects global interrupt sources
to the local interrupt controller on each hart.
This driver is based on the driver in the RISC-V tree from Palmer Dabbelt,
but has been almost entirely rewritten since, and includes many fixes
from Atish Patra.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
[Binding update by Palmer]
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'drivers/irqchip/Kconfig')
| -rw-r--r-- | drivers/irqchip/Kconfig | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index e9233db16e03..df345b878ac2 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -372,3 +372,15 @@ config QCOM_PDC IRQs for Qualcomm Technologies Inc (QTI) mobile chips. endmenu + +config SIFIVE_PLIC + bool "SiFive Platform-Level Interrupt Controller" + depends on RISCV + help + This enables support for the PLIC chip found in SiFive (and + potentially other) RISC-V systems. The PLIC controls devices + interrupts and connects them to each core's local interrupt + controller. Aside from timer and software interrupts, all other + interrupt sources are subordinate to the PLIC. + + If you don't know what to do here, say Y. |