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| author |   Agustin Vega-Frias <agustinv@codeaurora.org> | 2017-02-02 18:23:59 -0500 |
|---|---|---|
| committer |   Marc Zyngier <marc.zyngier@arm.com> | 2017-02-03 15:03:49 +0000 |
| commit | f20cc9b00c7b71f9b5e970b6bd4ac93b0d9cfd5b (patch) | |
| tree | 7f5e93ccdd4eac18b6cb28dcb07af444f85cde01 /drivers/irqchip/Makefile | |
| parent | ACPI: Add support for ResourceSource/IRQ domain mapping (diff) | |
| download | linux-dev-f20cc9b00c7b71f9b5e970b6bd4ac93b0d9cfd5b.tar.xz linux-dev-f20cc9b00c7b71f9b5e970b6bd4ac93b0d9cfd5b.zip | |
irqchip/qcom: Add IRQ combiner driver
Driver for interrupt combiners in the Top-level Control and Status
Registers (TCSR) hardware block in Qualcomm Technologies chips.
An interrupt combiner in this block combines a set of interrupts by
OR'ing the individual interrupt signals into a summary interrupt
signal routed to a parent interrupt controller, and provides read-
only, 32-bit registers to query the status of individual interrupts.
The status bit for IRQ n is bit (n % 32) within register (n / 32)
of the given combiner. Thus, each combiner can be described as a set
of register offsets and the number of IRQs managed.
Signed-off-by: Agustin Vega-Frias <agustinv@codeaurora.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/Makefile')
| -rw-r--r-- | drivers/irqchip/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 0e55d94065bf..5a53186351ef 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -75,3 +75,4 @@ obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o obj-$(CONFIG_EZNPS_GIC) += irq-eznps.o obj-$(CONFIG_ARCH_ASPEED) += irq-aspeed-vic.o obj-$(CONFIG_STM32_EXTI) += irq-stm32-exti.o +obj-$(CONFIG_QCOM_IRQ_COMBINER) += qcom-irq-combiner.o |