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| author |   Zenghui Yu <yuzenghui@huawei.com> | 2019-09-18 06:57:30 +0000 |
|---|---|---|
| committer |   Marc Zyngier <maz@kernel.org> | 2019-09-18 11:42:23 +0100 |
| commit | c107d613f9204ff9c7624c229938153d7492c56e (patch) | |
| tree | a9f011174cd6864a2338ac13a9ff671bbac52394 /drivers/irqchip/irq-sifive-plic.c | |
| parent | irqchip/atmel-aic5: Add support for sam9x60 irqchip (diff) | |
| download | linux-dev-c107d613f9204ff9c7624c229938153d7492c56e.tar.xz linux-dev-c107d613f9204ff9c7624c229938153d7492c56e.zip | |
irqchip/gic-v3: Fix GIC_LINE_NR accessor
As per GIC spec, ITLinesNumber indicates the maximum SPI INTID that
the GIC implementation supports. And the maximum SPI INTID an
implementation might support is 1019 (field value 11111).
max(GICD_TYPER_SPIS(...), 1020) is not what we actually want for
GIC_LINE_NR. Fix it to min(GICD_TYPER_SPIS(...), 1020).
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/1568789850-14080-1-git-send-email-yuzenghui@huawei.com
Diffstat (limited to 'drivers/irqchip/irq-sifive-plic.c')
0 files changed, 0 insertions, 0 deletions