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authorPaul Cercueil <paul@crapouillou.net>2018-07-13 16:49:09 +0200
committerMarc Zyngier <marc.zyngier@arm.com>2018-07-19 16:12:27 +0100
commit1047557cb9574a5be889bd45c1b4aa85209080e7 (patch)
treee9cd28a9ba3d0608d09a07e5b7e86e32430ba436 /drivers/irqchip
parentirqchip/stm32: Add exti0 translation for stm32mp1 (diff)
downloadlinux-dev-1047557cb9574a5be889bd45c1b4aa85209080e7.tar.xz
linux-dev-1047557cb9574a5be889bd45c1b4aa85209080e7.zip
irqchip/ingenic: Add support for the JZ4725B SoC
The interrupt controller of the JZ4725B works the same way as the other JZ SoCs from Ingenic; so we just add a new compatible string. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r--drivers/irqchip/irq-ingenic.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-ingenic.c b/drivers/irqchip/irq-ingenic.c
index fc5953dea509..2ff08986b536 100644
--- a/drivers/irqchip/irq-ingenic.c
+++ b/drivers/irqchip/irq-ingenic.c
@@ -165,6 +165,7 @@ static int __init intc_1chip_of_init(struct device_node *node,
return ingenic_intc_of_init(node, 1);
}
IRQCHIP_DECLARE(jz4740_intc, "ingenic,jz4740-intc", intc_1chip_of_init);
+IRQCHIP_DECLARE(jz4725b_intc, "ingenic,jz4725b-intc", intc_1chip_of_init);
static int __init intc_2chip_of_init(struct device_node *node,
struct device_node *parent)