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| author |   Marc Zyngier <maz@kernel.org> | 2019-07-25 15:30:51 +0100 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2019-08-20 10:23:35 +0100 |
| commit | ad5a78d3da81836c88d1f2d53310484462660997 (patch) | |
| tree | 669099a397f32c0356df947805229ba68e0b4579 /drivers/irqchip | |
| parent | irqchip/gic-v3: Add EPPI range support (diff) | |
| download | linux-dev-ad5a78d3da81836c88d1f2d53310484462660997.tar.xz linux-dev-ad5a78d3da81836c88d1f2d53310484462660997.zip | |
irqchip/gic-v3: Warn about inconsistent implementations of extended ranges
As is it usual for the GIC, it isn't disallowed to put together a system
that is majorly inconsistent, with a distributor supporting the
extended ranges while some of the CPUs don't.
Kindly tell the user that things are sailing isn't going to be smooth.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'drivers/irqchip')
| -rw-r--r-- | drivers/irqchip/irq-gic-v3.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index d3727e877872..8af08dd674f8 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -1014,6 +1014,11 @@ static void gic_cpu_init(void) gic_enable_redist(true); + WARN((gic_data.ppi_nr > 16 || GIC_ESPI_NR != 0) && + !(gic_read_ctlr() & ICC_CTLR_EL1_ExtRange), + "Distributor has extended ranges, but CPU%d doesn't\n", + smp_processor_id()); + rbase = gic_data_rdist_sgi_base(); /* Configure SGIs/PPIs as non-secure Group-1 */ |