diff options
| author |   Laurent Pinchart <laurent.pinchart@ideasonboard.com> | 2016-12-09 09:47:18 -0200 |
|---|---|---|
| committer |   Mauro Carvalho Chehab <mchehab@s-opensource.com> | 2016-12-21 07:31:49 -0200 |
| commit | b4b2de386bbb6589d81596999d4a924928dc119b (patch) | |
| tree | f0b4c84f0ad7420d5e90a83074f1b6e191e0a2c8 /drivers/media/i2c/tvp5150_reg.h | |
| parent | [media] v4l: tvp5150: Reset device at probe time, not in get/set format handlers (diff) | |
| download | linux-dev-b4b2de386bbb6589d81596999d4a924928dc119b.tar.xz linux-dev-b4b2de386bbb6589d81596999d4a924928dc119b.zip | |
[media] v4l: tvp5150: Fix comment regarding output pin muxing
The FID/GLCO/VLK/HVLK and INTREQ/GPCL/VBLK pins are muxed differently
depending on whether the input is an S-Video or composite signal. The
comment that explains the logic doesn't reflect the code. It appears
that the comment is incorrect, as disabling the output data bus in
composite mode makes no sense. Update the comment to match the code.
While at it define macros for the MISC_CTL register bits, the code is
too confusing with numerical values.
Cc: stable@vger.kernel.org # For Kernel 4.5 and upper
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat (limited to 'drivers/media/i2c/tvp5150_reg.h')
| -rw-r--r-- | drivers/media/i2c/tvp5150_reg.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/media/i2c/tvp5150_reg.h b/drivers/media/i2c/tvp5150_reg.h index 25a994944918..30a48c28d05a 100644 --- a/drivers/media/i2c/tvp5150_reg.h +++ b/drivers/media/i2c/tvp5150_reg.h @@ -9,6 +9,15 @@ #define TVP5150_ANAL_CHL_CTL 0x01 /* Analog channel controls */ #define TVP5150_OP_MODE_CTL 0x02 /* Operation mode controls */ #define TVP5150_MISC_CTL 0x03 /* Miscellaneous controls */ +#define TVP5150_MISC_CTL_VBLK_GPCL BIT(7) +#define TVP5150_MISC_CTL_GPCL BIT(6) +#define TVP5150_MISC_CTL_INTREQ_OE BIT(5) +#define TVP5150_MISC_CTL_HVLK BIT(4) +#define TVP5150_MISC_CTL_YCBCR_OE BIT(3) +#define TVP5150_MISC_CTL_SYNC_OE BIT(2) +#define TVP5150_MISC_CTL_VBLANK BIT(1) +#define TVP5150_MISC_CTL_CLOCK_OE BIT(0) + #define TVP5150_AUTOSW_MSK 0x04 /* Autoswitch mask: TVP5150A / TVP5150AM */ /* Reserved 05h */ |