diff options
| author |   Rajashekhara, Sudhakar <sudhakar.raj@ti.com> | 2010-07-28 05:47:48 -0300 |
|---|---|---|
| committer |   Mauro Carvalho Chehab <mchehab@redhat.com> | 2010-08-08 23:43:07 -0300 |
| commit | 560afa7d85bdfb294506afd3032c315e6827824f (patch) | |
| tree | 2b4a1ae89f2060cf767a071f78614c055378681c /drivers/media | |
| parent | V4L/DVB: dvb: siano: free spinlock before schedule() (diff) | |
| download | linux-dev-560afa7d85bdfb294506afd3032c315e6827824f.tar.xz linux-dev-560afa7d85bdfb294506afd3032c315e6827824f.zip | |
V4L/DVB: tvp7002: fix write to H-PLL Feedback Divider LSB register
H-PLL Feedback Divider LSB register is an 8 bit register out
of which the first 4 bits are reserved. Current code is
writing to these reserved location. This patch corrects
this issue by left shifting the values being written to the
register by 4.
This patch has been tested on DM6467 EVM with 720P-60 and
1080I-60 inputs.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media')
| -rw-r--r-- | drivers/media/video/tvp7002.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/media/video/tvp7002.c b/drivers/media/video/tvp7002.c index 8085ac392446..48f5c76ab521 100644 --- a/drivers/media/video/tvp7002.c +++ b/drivers/media/video/tvp7002.c @@ -179,7 +179,7 @@ static const struct i2c_reg_value tvp7002_init_default[] = { /* Register parameters for 480P */ static const struct i2c_reg_value tvp7002_parms_480P[] = { { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE }, - { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0a, TVP7002_WRITE }, + { TVP7002_HPLL_FDBK_DIV_LSBS, 0xa0, TVP7002_WRITE }, { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE }, { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE }, @@ -223,7 +223,7 @@ static const struct i2c_reg_value tvp7002_parms_576P[] = { /* Register parameters for 1080I60 */ static const struct i2c_reg_value tvp7002_parms_1080I60[] = { { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE }, - { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE }, + { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE }, { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE }, { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE }, @@ -245,7 +245,7 @@ static const struct i2c_reg_value tvp7002_parms_1080I60[] = { /* Register parameters for 1080P60 */ static const struct i2c_reg_value tvp7002_parms_1080P60[] = { { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE }, - { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE }, + { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE }, { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE }, { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE }, @@ -289,7 +289,7 @@ static const struct i2c_reg_value tvp7002_parms_1080I50[] = { /* Register parameters for 720P60 */ static const struct i2c_reg_value tvp7002_parms_720P60[] = { { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE }, - { TVP7002_HPLL_FDBK_DIV_LSBS, 0x02, TVP7002_WRITE }, + { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE }, { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE }, { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE }, @@ -311,7 +311,7 @@ static const struct i2c_reg_value tvp7002_parms_720P60[] = { /* Register parameters for 720P50 */ static const struct i2c_reg_value tvp7002_parms_720P50[] = { { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE }, - { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0c, TVP7002_WRITE }, + { TVP7002_HPLL_FDBK_DIV_LSBS, 0xc0, TVP7002_WRITE }, { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE }, { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE }, { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE }, |