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authorDmitry Osipenko <digetx@gmail.com>2019-08-12 00:00:34 +0300
committerThierry Reding <treding@nvidia.com>2019-11-11 14:55:26 +0100
commitf541efaa7459621fb68eb6e54546e195ab48d43a (patch)
treee564c8c713abe79c8c9c3f5c6bde4416bc10764e /drivers/memory
parentmemory: tegra: Pre-configure debug register on Tegra20 (diff)
downloadlinux-dev-f541efaa7459621fb68eb6e54546e195ab48d43a.tar.xz
linux-dev-f541efaa7459621fb68eb6e54546e195ab48d43a.zip
memory: tegra: Print a brief info message about EMC timings
During boot print how many memory timings got the driver and what's the RAM code. This is a very useful information when something is wrong with boards memory timing. Suggested-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/memory')
-rw-r--r--drivers/memory/tegra/tegra20-emc.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c
index 85c24f285fd4..25a6aad6a7a9 100644
--- a/drivers/memory/tegra/tegra20-emc.c
+++ b/drivers/memory/tegra/tegra20-emc.c
@@ -368,6 +368,13 @@ static int tegra_emc_load_timings_from_dt(struct tegra_emc *emc,
sort(emc->timings, emc->num_timings, sizeof(*timing), cmp_timings,
NULL);
+ dev_info(emc->dev,
+ "got %u timings for RAM code %u (min %luMHz max %luMHz)\n",
+ emc->num_timings,
+ tegra_read_ram_code(),
+ emc->timings[0].rate / 1000000,
+ emc->timings[emc->num_timings - 1].rate / 1000000);
+
return 0;
}