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| author |   Yong Wu <yong.wu@mediatek.com> | 2021-01-11 19:18:46 +0800 |
|---|---|---|
| committer |   Will Deacon <will@kernel.org> | 2021-02-01 11:27:59 +0000 |
| commit | fc3734698a435b301183acc8332f0a5fba868bc3 (patch) | |
| tree | 1a8342f1a2d16f2c866769cbfd898e572278f95c /drivers/memory | |
| parent | dt-bindings: memory: mediatek: Rename header guard for SMI header file (diff) | |
| download | linux-dev-fc3734698a435b301183acc8332f0a5fba868bc3.tar.xz linux-dev-fc3734698a435b301183acc8332f0a5fba868bc3.zip | |
dt-bindings: mediatek: Add binding for mt8192 IOMMU
This patch adds decriptions for mt8192 IOMMU and SMI.
mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
table format. The M4U-SMI HW diagram is as below:
EMI
|
M4U
|
------------
SMI Common
------------
|
+-------+------+------+----------------------+-------+
| | | | ...... | |
| | | | | |
larb0 larb1 larb2 larb4 ...... larb19 larb20
disp0 disp1 mdp vdec IPE IPE
All the connections are HW fixed, SW can NOT adjust it.
mt8192 M4U support 0~16GB iova range. we preassign different engines
into different iova ranges:
domain-id module iova-range larbs
0 disp 0 ~ 4G larb0/1
1 vcodec 4G ~ 8G larb4/5/7
2 cam/mdp 8G ~ 12G larb2/9/11/13/14/16/17/18/19/20
3 CCU0 0x4000_0000 ~ 0x43ff_ffff larb13: port 9/10
4 CCU1 0x4400_0000 ~ 0x47ff_ffff larb14: port 4/5
The iova range for CCU0/1(camera control unit) is HW requirement.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
Link: https://lore.kernel.org/r/20210111111914.22211-6-yong.wu@mediatek.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/memory')
0 files changed, 0 insertions, 0 deletions