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| author |   Saheed O. Bolarinwa <refactormyself@gmail.com> | 2020-07-13 14:22:25 +0200 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-07-13 15:39:52 +0200 |
| commit | 3a12c2b5f38227a7104ce9f2be682059c7c93100 (patch) | |
| tree | ce7e38fa13dc2ec19b106e5e8f0271b50ac1eb56 /drivers/misc/cxl | |
| parent | misc: rtsx: Add support new chip rts5228 mmc: rtsx: Add support MMC_CAP2_NO_MMC (diff) | |
| download | linux-dev-3a12c2b5f38227a7104ce9f2be682059c7c93100.tar.xz linux-dev-3a12c2b5f38227a7104ce9f2be682059c7c93100.zip | |
cxl: Change PCIBIOS_SUCCESSFUL to 0
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
There scope should be limited within arch/x86.
Change all PCIBIOS_SUCCESSFUL to 0
Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
Link: https://lore.kernel.org/r/20200713122247.10985-14-refactormyself@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/misc/cxl')
| -rw-r--r-- | drivers/misc/cxl/vphb.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/misc/cxl/vphb.c b/drivers/misc/cxl/vphb.c index 1cf320e2a415..1264253cc07b 100644 --- a/drivers/misc/cxl/vphb.c +++ b/drivers/misc/cxl/vphb.c @@ -150,7 +150,7 @@ static int cxl_pcie_read_config(struct pci_bus *bus, unsigned int devfn, out: cxl_afu_configured_put(afu); - return rc ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; + return rc ? PCIBIOS_DEVICE_NOT_FOUND : 0; } static int cxl_pcie_write_config(struct pci_bus *bus, unsigned int devfn, @@ -184,7 +184,7 @@ static int cxl_pcie_write_config(struct pci_bus *bus, unsigned int devfn, out: cxl_afu_configured_put(afu); - return rc ? PCIBIOS_SET_FAILED : PCIBIOS_SUCCESSFUL; + return rc ? PCIBIOS_SET_FAILED : 0; } static struct pci_ops cxl_pcie_pci_ops = |