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| author |   Moti Haimovski <mhaimovski@habana.ai> | 2022-04-05 11:45:51 +0300 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2022-05-22 21:01:18 +0200 |
| commit | 0ff1d6f8f55eafadea0a5ca25d0eaf3571813c70 (patch) | |
| tree | 8fb8fd3db21d131487f9ede656348db5e17643a2 /drivers/misc/habanalabs/common/device.c | |
| parent | habanalabs: use for_each_sgtable_dma_sg for dma sgt (diff) | |
| download | linux-dev-0ff1d6f8f55eafadea0a5ca25d0eaf3571813c70.tar.xz linux-dev-0ff1d6f8f55eafadea0a5ca25d0eaf3571813c70.zip | |
habanalabs: support debugfs Byte access to device DRAM
The habanalabs HW requires memory resources to be used by its
internal hardware structures. These structures are allocated and
initialized by the driver. We would like to use the device HBM for
that purpose. This memory is io-remapped and accessed using the
writel()/writeb()/writew() commands.
Since some of the HW structures are one byte in size we need to
add support for the writeb() and readb() functions in the driver.
Signed-off-by: Moti Haimovski <mhaimovski@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/misc/habanalabs/common/device.c')
| -rw-r--r-- | drivers/misc/habanalabs/common/device.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/misc/habanalabs/common/device.c b/drivers/misc/habanalabs/common/device.c index 9bca855b4649..350cd61e06c1 100644 --- a/drivers/misc/habanalabs/common/device.c +++ b/drivers/misc/habanalabs/common/device.c @@ -53,6 +53,14 @@ static int hl_access_sram_dram_region(struct hl_device *hdev, u64 addr, u64 *val } switch (acc_type) { + case DEBUGFS_READ8: + *val = readb(hdev->pcie_bar[region->bar_id] + + addr - region->region_base + region->offset_in_bar); + break; + case DEBUGFS_WRITE8: + writeb(*val, hdev->pcie_bar[region->bar_id] + + addr - region->region_base + region->offset_in_bar); + break; case DEBUGFS_READ32: *val = readl(hdev->pcie_bar[region->bar_id] + addr - region->region_base + region->offset_in_bar); @@ -148,7 +156,11 @@ int hl_access_cfg_region(struct hl_device *hdev, u64 addr, u64 *val, WREG32(addr - cfg_region->region_base, lower_32_bits(*val)); WREG32(addr + sizeof(u32) - cfg_region->region_base, upper_32_bits(*val)); break; + default: + dev_err(hdev->dev, "access type %d is not supported\n", acc_type); + return -EOPNOTSUPP; } + return 0; } |