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authorTomer Tayar <ttayar@habana.ai>2019-04-28 19:17:38 +0300
committerOded Gabbay <oded.gabbay@gmail.com>2019-04-28 19:17:38 +0300
commit03d5f641dc711eb93145ded91ed68b4be729be4d (patch)
tree11a2007fa857787211c44097645c697167730750 /drivers/misc/habanalabs/include
parenthabanalabs: return old dram bar address upon change (diff)
downloadlinux-dev-03d5f641dc711eb93145ded91ed68b4be729be4d.tar.xz
linux-dev-03d5f641dc711eb93145ded91ed68b4be729be4d.zip
habanalabs: Use single pool for CPU accessible host memory
The device's CPU accessible memory on host is managed in a dedicated pool, except for 2 regions - Primary Queue (PQ) and Event Queue (EQ) - which are allocated from generic DMA pools. Due to address length limitations of the CPU, the addresses of all these memory regions must have the same MSBs starting at bit 40. This patch modifies the allocation of the PQ and EQ to be also from the dedicated pool, to ensure compliance with the limitation. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Diffstat (limited to 'drivers/misc/habanalabs/include')
-rw-r--r--drivers/misc/habanalabs/include/armcp_if.h8
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/misc/habanalabs/include/armcp_if.h b/drivers/misc/habanalabs/include/armcp_if.h
index c8f28cadc335..1f1e35e86d84 100644
--- a/drivers/misc/habanalabs/include/armcp_if.h
+++ b/drivers/misc/habanalabs/include/armcp_if.h
@@ -300,14 +300,6 @@ enum armcp_pwm_attributes {
armcp_pwm_enable
};
-#define HL_CPU_PKT_SHIFT 5
-#define HL_CPU_PKT_SIZE (1 << HL_CPU_PKT_SHIFT)
-#define HL_CPU_PKT_MASK (~((1 << HL_CPU_PKT_SHIFT) - 1))
-#define HL_CPU_MAX_PKTS_IN_CB 32
-#define HL_CPU_CB_SIZE (HL_CPU_PKT_SIZE * \
- HL_CPU_MAX_PKTS_IN_CB)
-#define HL_CPU_ACCESSIBLE_MEM_SIZE (HL_QUEUE_LENGTH * HL_CPU_CB_SIZE)
-
/* Event Queue Packets */
struct eq_generic_event {