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| author |   Rajaravi Krishna Katta <rkatta@habana.ai> | 2021-10-26 14:11:06 +0300 |
|---|---|---|
| committer |   Oded Gabbay <ogabbay@kernel.org> | 2021-12-26 08:59:04 +0200 |
| commit | e84e31a9123bda35a1e61f391e7c30e8b3a8ea5b (patch) | |
| tree | 231c5adaad1ba14cd4ba259bda0e3ea2c0e6212d /drivers/misc/habanalabs/include | |
| parent | habanalabs: handle abort scenario for user interrupt (diff) | |
| download | linux-dev-e84e31a9123bda35a1e61f391e7c30e8b3a8ea5b.tar.xz linux-dev-e84e31a9123bda35a1e61f391e7c30e8b3a8ea5b.zip | |
habanalabs: add dedicated message towards f/w to set power
CPUCP_PACKET_POWER_GET packet type was used for both
hl_get_power() and hl_set_power().
To align with other sensor functions hl_set_power()
should use CPUCP_PACKET_POWER_SET.
This packet will only be used with newer ASICs, so need to add
a compatibility flag to the asic properties to indicate whether to use
this packet or the GET packet.
Signed-off-by: Rajaravi Krishna Katta <rkatta@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Diffstat (limited to 'drivers/misc/habanalabs/include')
| -rw-r--r-- | drivers/misc/habanalabs/include/common/cpucp_if.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/misc/habanalabs/include/common/cpucp_if.h b/drivers/misc/habanalabs/include/common/cpucp_if.h index ae13231fda94..17927968e19a 100644 --- a/drivers/misc/habanalabs/include/common/cpucp_if.h +++ b/drivers/misc/habanalabs/include/common/cpucp_if.h @@ -376,6 +376,9 @@ enum pq_init_status { * and QMANs. The f/w will return a bitmask where each bit represents * a different engine or QMAN according to enum cpucp_idle_mask. * The bit will be 1 if the engine is NOT idle. + * + * CPUCP_PACKET_POWER_SET - + * Resets power history of device to 0 */ enum cpucp_packet_id { @@ -421,6 +424,7 @@ enum cpucp_packet_id { CPUCP_PACKET_NIC_STAT_REGS_CLR, /* internal */ CPUCP_PACKET_NIC_STAT_REGS_ALL_GET, /* internal */ CPUCP_PACKET_IS_IDLE_CHECK, /* internal */ + CPUCP_PACKET_POWER_SET, /* internal */ }; #define CPUCP_PACKET_FENCE_VAL 0xFE8CE7A5 |