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authorLinus Torvalds <torvalds@linux-foundation.org>2016-03-21 14:35:52 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2016-03-21 14:35:52 -0700
commite531cdf50a8a0fb7a4d51c06e52097bd01e9bf7c (patch)
tree55a0b1f8116f4d4800b7f3b0d5422cb12f0397fd /drivers/mmc/host/dw_mmc.h
parentMerge tag 'md/4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/shli/md (diff)
parentmmc: sdhci-of-at91: fix wake-up issue when using runtime pm (diff)
downloadlinux-dev-e531cdf50a8a0fb7a4d51c06e52097bd01e9bf7c.tar.xz
linux-dev-e531cdf50a8a0fb7a4d51c06e52097bd01e9bf7c.zip
Merge tag 'mmc-v4.6' of git://git.linaro.org/people/ulf.hansson/mmc
Pull MMC updates from Ulf Hansson: "MMC core: - Fix ABI regression of MMC BLK ioctl - Remove the unused MMC_DATA_STREAM flag - Enable asynchronous system PM for the host device - Minor fixes and clean-ups SDHCI host: Throughout the years, the numbers of SDHCI variants have increased and so has also the numbers of SDHCI callbacks/quirks. The purpose of these callbacks/quirks were to enable SDHCI to deal with variant specific requirements, but unfortunate this method didn't scale. Instead we have ended up with a mess. Not only did the code become suboptimal but also highly fragile. Lately many discussions of how to move forward with SDHCI has taken place at the MMC mailing list. Step by step, we aim to turn SDHCI's common code into a set of library functions. This will enable for optimizations and allow some of the existing callbacks and quirks to be removed, which also should help to make the code less fragile. Therefore I am also really pleased to announce that Adrian Hunter (Intel) has volunteered to step in as the maintainer for SDHCI. Future wise, I hope the community around SDHCI will continue to grow and that this release cycle can be the starting point of moving SDHCI into a better shape. As a matter of fact, already in this cycle the re-factoring has begun, but of course there are also fixes and new features included. Some highlights: - sdhci-iproc: Add support for Broadcom's BCM2835 eMMC IP - sdhci-acpi: Add support for QCOM controllers - sdhci-pic32: Add new SDHCI variant for PIC32MZDA Other hosts: - atmel-mci: Fix a NULL pointer dereference - mediatek: Add SD write-protect support - mmc_spi: Fix card detect in GPIO case - tmio/sdhi: Add r8a7795 support - tmio/sdhi: Some fixes and clean-ups - dw_mmc: Add HW reset support - dw_mmc: Some fixes and clean-ups - sunxi: Add support for MMC DDR52 mode" * tag 'mmc-v4.6' of git://git.linaro.org/people/ulf.hansson/mmc: (123 commits) mmc: sdhci-of-at91: fix wake-up issue when using runtime pm mmc: sdhci-pci: Do not set DMA mask in enable_dma() mmc: sdhci-acpi: Remove enable_dma() hook mmc: sdhci: Set DMA mask when adding host mmc: block: fix ABI regression of mmc_blk_ioctl mmc: atmel-mci: Check pdata for NULL before dereferencing it at DMA config mmc: core: remove redundant memset of sdio_read_cccr mmc: core: remove redundant memset of mmc_decode_cid mmc: of_mmc_spi: fix unused warning mmc: sdhci-of-arasan: add phy support for sdhci-of-arasan mmc: sdhci-of-arasan: fix missing sdhci_pltfm_free for err handling mmc: sdhci-of-arasan: remove disable clk_ahb from sdhci_arasan_resume Documentation: bindings: add description of phy for sdhci-of-arasan mmc: sdhci: Fix override of timeout clk wrt max_busy_timeout mmc: mmci: Remove unnecessary header file mmc: sdhci-acpi: add QCOM controllers mmc: tegra: implement memcomp pad calibration mmc: mediatek: Use mmc_regulator_set_vqmmc in start_signal_voltage_switch mmc: mediatek: Change signal voltage error to dev_dbg() mmc: sh_mmcif, tmio: Use ARCH_RENESAS ...
Diffstat (limited to 'drivers/mmc/host/dw_mmc.h')
-rw-r--r--drivers/mmc/host/dw_mmc.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
index f695b58f0613..68d5da2dfd19 100644
--- a/drivers/mmc/host/dw_mmc.h
+++ b/drivers/mmc/host/dw_mmc.h
@@ -46,6 +46,7 @@
#define SDMMC_VERID 0x06c
#define SDMMC_HCON 0x070
#define SDMMC_UHS_REG 0x074
+#define SDMMC_RST_N 0x078
#define SDMMC_BMOD 0x080
#define SDMMC_PLDMND 0x084
#define SDMMC_DBADDR 0x088
@@ -169,6 +170,8 @@
#define SDMMC_IDMAC_ENABLE BIT(7)
#define SDMMC_IDMAC_FB BIT(1)
#define SDMMC_IDMAC_SWRESET BIT(0)
+/* H/W reset */
+#define SDMMC_RST_HWACTIVE 0x1
/* Version ID register define */
#define SDMMC_GET_VERID(x) ((x) & 0xFFFF)
/* Card read threshold */
@@ -265,6 +268,7 @@ struct dw_mci_slot {
#define DW_MMC_CARD_PRESENT 0
#define DW_MMC_CARD_NEED_INIT 1
#define DW_MMC_CARD_NO_LOW_PWR 2
+#define DW_MMC_CARD_NO_USE_HOLD 3
int id;
int sdio_id;
};
@@ -274,7 +278,6 @@ struct dw_mci_slot {
* @caps: mmc subsystem specified capabilities of the controller(s).
* @init: early implementation specific initialization.
* @setup_clock: implementation specific clock configuration.
- * @prepare_command: handle CMD register extensions.
* @set_ios: handle bus specific extensions.
* @parse_dt: parse implementation specific device tree properties.
* @execute_tuning: implementation specific tuning procedure.
@@ -287,7 +290,6 @@ struct dw_mci_drv_data {
unsigned long *caps;
int (*init)(struct dw_mci *host);
int (*setup_clock)(struct dw_mci *host);
- void (*prepare_command)(struct dw_mci *host, u32 *cmdr);
void (*set_ios)(struct dw_mci *host, struct mmc_ios *ios);
int (*parse_dt)(struct dw_mci *host);
int (*execute_tuning)(struct dw_mci_slot *slot, u32 opcode);