clk: renesas: rcar-gen3: Switch to new SD clock handling

The old SD handling code was huge and could not handle all the details
which showed up on R-Car Gen3 SoCs meanwhile. It is time to switch to
another design. Have SDnH a separate clock, use the existing divider
clocks and move the errata handling from the clock driver to the SDHI
driver where it belongs.

This patch removes the old SD handling code and switch to the new one.
This updates the SDHI driver at the same time. Because the SDHI driver
can only communicate with the clock driver via clk_set_rate(), I don't
see an alternative to this flag-day-approach, so we cross subsystems
here.

The patch sadly looks messy for the CPG lib, but it is basically a huge
chunk of code removed and smaller chunks added. It looks much better
when you just view the resulting source file.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC
Link: https://lore.kernel.org/r/20211110191610.5664-6-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h
index cd82420677cc..66d308e73e17 100644
--- a/drivers/mmc/host/renesas_sdhi.h
+++ b/drivers/mmc/host/renesas_sdhi.h
@@ -60,6 +60,7 @@ struct tmio_mmc_dma {
 
 struct renesas_sdhi {
 	struct clk *clk;
+	struct clk *clkh;
 	struct clk *clk_cd;
 	struct tmio_mmc_data mmc_data;
 	struct tmio_mmc_dma dma_priv;