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| author |   Dong Aisheng <b29396@freescale.com> | 2013-10-18 19:48:44 +0800 |
|---|---|---|
| committer |   Chris Ball <chris@printf.net> | 2013-10-21 15:58:03 -0400 |
| commit | 6b4fb6712a4c58b205c163e9080c349d71c208d0 (patch) | |
| tree | fa1a5e3eefb4ce2a6f4b48076e58f32ad5d63433 /drivers/mmc | |
| parent | mmc: sdhci-esdhc-imx: add std tuning support for mx6sl (diff) | |
| download | linux-dev-6b4fb6712a4c58b205c163e9080c349d71c208d0.tar.xz linux-dev-6b4fb6712a4c58b205c163e9080c349d71c208d0.zip | |
mmc: sdhci-esdhc-imx: fix reading cap_1 register value for mx6sl
When reading CAP_1 register for mx6sl, ignore bit[0-15] as it stores
CAP_2 register value which is new introduced in mx6sl.
Without this fix, the max clock for mx6sl may not be correct since
it's wrongly calculated by reading CAP_1 register.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/sdhci-esdhc-imx.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 3b9c94f74ed0..1652e18b399b 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -226,6 +226,10 @@ static u32 esdhc_readl_le(struct sdhci_host *host, int reg) } if (unlikely(reg == SDHCI_CAPABILITIES)) { + /* ignore bit[0-15] as it stores cap_1 register val for mx6sl */ + if (imx_data->socdata->flags & ESDHC_FLAG_HAVE_CAP1) + val &= 0xffff0000; + /* In FSL esdhc IC module, only bit20 is used to indicate the * ADMA2 capability of esdhc, but this bit is messed up on * some SOCs (e.g. on MX25, MX35 this bit is set, but they |