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authorWu, Josh <Josh.wu@atmel.com>2014-08-05 18:38:52 +0800
committerBrian Norris <computersforpeace@gmail.com>2014-08-19 11:53:09 -0700
commitff0a215438cf7be0a652cb3457f562539bd40b22 (patch)
treebea81910d922d42201ea0f8b538e5b6219089405 /drivers/mtd/nand
parentmtd: terminate user-provided string (diff)
downloadlinux-dev-ff0a215438cf7be0a652cb3457f562539bd40b22.tar.xz
linux-dev-ff0a215438cf7be0a652cb3457f562539bd40b22.zip
mtd: atmel_nand: NFC: fix mtd_nandbiterrs.ko test fail when using sram write
When enable NFC sram write, it will failed the mtd_nandbiterrs.ko test. As in driver's nfc_sram_write_page(), if ops->mode equal to MTD_OSP_RAW, driver assumes the data buffer contains one page data and one oob data followed. And driver will write the page data and oob data to nand. But this is wrong implementation. Since the data buffer don't contains the oob data to write. We should write the chip->oob_poi to nand's oob. So this patch fix it by writing the oob data from chip->oob_poi. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r--drivers/mtd/nand/atmel_nand.c17
1 files changed, 9 insertions, 8 deletions
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 0abc965caedf..9c5f717bda54 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1907,15 +1907,7 @@ static int nfc_sram_write_page(struct mtd_info *mtd, struct nand_chip *chip,
if (offset || (data_len < mtd->writesize))
return -EINVAL;
- cfg = nfc_readl(host->nfc->hsmc_regs, CFG);
len = mtd->writesize;
-
- if (unlikely(raw)) {
- len += mtd->oobsize;
- nfc_writel(host->nfc->hsmc_regs, CFG, cfg | NFC_CFG_WSPARE);
- } else
- nfc_writel(host->nfc->hsmc_regs, CFG, cfg & ~NFC_CFG_WSPARE);
-
/* Copy page data to sram that will write to nand via NFC */
if (use_dma) {
if (atmel_nand_dma_op(mtd, (void *)buf, len, 0) != 0)
@@ -1925,6 +1917,15 @@ static int nfc_sram_write_page(struct mtd_info *mtd, struct nand_chip *chip,
memcpy32_toio(sram, buf, len);
}
+ cfg = nfc_readl(host->nfc->hsmc_regs, CFG);
+ if (unlikely(raw) && oob_required) {
+ memcpy32_toio(sram + len, chip->oob_poi, mtd->oobsize);
+ len += mtd->oobsize;
+ nfc_writel(host->nfc->hsmc_regs, CFG, cfg | NFC_CFG_WSPARE);
+ } else {
+ nfc_writel(host->nfc->hsmc_regs, CFG, cfg & ~NFC_CFG_WSPARE);
+ }
+
if (chip->ecc.mode == NAND_ECC_HW && host->has_pmecc)
/*
* When use NFC sram, need set up PMECC before send