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author | Arnaldo Carvalho de Melo <acme@redhat.com> | 2019-11-26 11:06:19 -0300 |
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committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2019-11-26 11:06:19 -0300 |
commit | 2ea352d5960ad469f5712cf3e293db97beac4e01 (patch) | |
tree | c24ae19073f2884867b310ee193d36a82075b60f /drivers/net/can/c_can/c_can_platform.c | |
parent | Merge branch 'x86/core' into perf/core, to resolve conflicts and to pick up completed topic tree (diff) | |
parent | Merge tag 'for-linus-5.5-1' of git://github.com/cminyard/linux-ipmi (diff) | |
download | linux-dev-2ea352d5960ad469f5712cf3e293db97beac4e01.tar.xz linux-dev-2ea352d5960ad469f5712cf3e293db97beac4e01.zip |
Merge remote-tracking branch 'torvalds/master' into perf/core
To pick up BPF changes we'll need.
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'drivers/net/can/c_can/c_can_platform.c')
-rw-r--r-- | drivers/net/can/c_can/c_can_platform.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/net/can/c_can/c_can_platform.c b/drivers/net/can/c_can/c_can_platform.c index b5145a7f874c..05f425ceb53a 100644 --- a/drivers/net/can/c_can/c_can_platform.c +++ b/drivers/net/can/c_can/c_can_platform.c @@ -39,10 +39,11 @@ #include "c_can.h" -#define DCAN_RAM_INIT_BIT (1 << 3) +#define DCAN_RAM_INIT_BIT BIT(3) + static DEFINE_SPINLOCK(raminit_lock); -/* - * 16-bit c_can registers can be arranged differently in the memory + +/* 16-bit c_can registers can be arranged differently in the memory * architecture of different implementations. For example: 16-bit * registers can be aligned to a 16-bit boundary or 32-bit boundary etc. * Handle the same by providing a common read/write interface. @@ -54,7 +55,7 @@ static u16 c_can_plat_read_reg_aligned_to_16bit(const struct c_can_priv *priv, } static void c_can_plat_write_reg_aligned_to_16bit(const struct c_can_priv *priv, - enum reg index, u16 val) + enum reg index, u16 val) { writew(val, priv->base + priv->regs[index]); } @@ -66,7 +67,7 @@ static u16 c_can_plat_read_reg_aligned_to_32bit(const struct c_can_priv *priv, } static void c_can_plat_write_reg_aligned_to_32bit(const struct c_can_priv *priv, - enum reg index, u16 val) + enum reg index, u16 val) { writew(val, priv->base + 2 * priv->regs[index]); } @@ -144,13 +145,13 @@ static u32 c_can_plat_read_reg32(const struct c_can_priv *priv, enum reg index) u32 val; val = priv->read_reg(priv, index); - val |= ((u32) priv->read_reg(priv, index + 1)) << 16; + val |= ((u32)priv->read_reg(priv, index + 1)) << 16; return val; } -static void c_can_plat_write_reg32(const struct c_can_priv *priv, enum reg index, - u32 val) +static void c_can_plat_write_reg32(const struct c_can_priv *priv, + enum reg index, u32 val) { priv->write_reg(priv, index + 1, val >> 16); priv->write_reg(priv, index, val); @@ -161,8 +162,8 @@ static u32 d_can_plat_read_reg32(const struct c_can_priv *priv, enum reg index) return readl(priv->base + priv->regs[index]); } -static void d_can_plat_write_reg32(const struct c_can_priv *priv, enum reg index, - u32 val) +static void d_can_plat_write_reg32(const struct c_can_priv *priv, + enum reg index, u32 val) { writel(val, priv->base + priv->regs[index]); } |