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authorVladimir Oltean <olteanv@gmail.com>2019-10-16 21:41:02 +0300
committerDavid S. Miller <davem@davemloft.net>2019-10-18 12:55:30 -0400
commit2fb079a28ae856145e8977d08b77403a3a5d6a70 (patch)
treee5b7f51f2a6b207f6d2f4355e35c6b7b7e78ae4b /drivers/net/dsa/bcm_sf2_regs.h
parentnet: netsec: Correct dma sync for XDP_TX frames (diff)
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net: dsa: sja1105: Switch to hardware operations for PTP
Adjusting the hardware clock (PTPCLKVAL, PTPCLKADD, PTPCLKRATE) is a requirement for the auxiliary PTP functionality of the switch (TTEthernet, PPS input, PPS output). Therefore we need to switch to using these registers to keep a synchronized time in hardware, instead of the timecounter/cyclecounter implementation, which is reliant on the free-running PTPTSCLK. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/bcm_sf2_regs.h')
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