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authorJohn Crispin <john@phrozen.org>2017-08-07 16:20:49 +0200
committerDavid S. Miller <davem@davemloft.net>2017-08-08 18:01:25 -0700
commit8e6f1521ec431dbade73f57e21e5dc46eaae50ba (patch)
tree9881f43229f1a00d3359d1d62fc103e59a7ad53e /drivers/net/dsa/mt7530.h
parentnet/mlx4_en: don't set CHECKSUM_COMPLETE on SCTP packets (diff)
downloadlinux-dev-8e6f1521ec431dbade73f57e21e5dc46eaae50ba.tar.xz
linux-dev-8e6f1521ec431dbade73f57e21e5dc46eaae50ba.zip
net: dsa: mediatek: add adjust link support for user ports
Manually adjust the port settings of user ports once PHY polling has completed. This patch extends the adjust_link callback to configure the per port PMCR register, applying the proper values polled from the PHY. Without this patch flow control was not always getting setup properly. Signed-off-by: Shashidhar Lakkavalli <shashidhar.lakkavalli@openmesh.com> Signed-off-by: Muciri Gatimu <muciri@openmesh.com> Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/mt7530.h')
-rw-r--r--drivers/net/dsa/mt7530.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h
index b83d76b99802..74db9822eb40 100644
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -151,6 +151,7 @@ enum mt7530_stp_state {
#define PMCR_TX_FC_EN BIT(5)
#define PMCR_RX_FC_EN BIT(4)
#define PMCR_FORCE_SPEED_1000 BIT(3)
+#define PMCR_FORCE_SPEED_100 BIT(2)
#define PMCR_FORCE_FDX BIT(1)
#define PMCR_FORCE_LNK BIT(0)
#define PMCR_COMMON_LINK (PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | \