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| author |   Heiner Kallweit <hkallweit1@gmail.com> | 2019-02-28 07:39:15 +0100 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2019-03-01 21:37:05 -0800 |
| commit | ed8fe20205ac054bf585156709de3913d1890f30 (patch) | |
| tree | 825394213cada27fad8238e16eedd707334a859a /drivers/net/dsa/mv88e6xxx/port.h | |
| parent | ipv4: Add ICMPv6 support when parse route ipproto (diff) | |
| download | linux-dev-ed8fe20205ac054bf585156709de3913d1890f30.tar.xz linux-dev-ed8fe20205ac054bf585156709de3913d1890f30.zip | |
net: dsa: mv88e6xxx: prevent interrupt storm caused by mv88e6390x_port_set_cmode
When debugging another issue I faced an interrupt storm in this
driver (88E6390, port 9 in SGMII mode), consisting of alternating
link-up / link-down interrupts. Analysis showed that the driver
wanted to set a cmode that was set already. But so far
mv88e6390x_port_set_cmode() doesn't check this and powers down
SERDES, what causes the link to break, and eventually results in
the described interrupt storm.
Fix this by checking whether the cmode actually changes. We want
that the very first call to mv88e6390x_port_set_cmode() always
configures the registers, therefore initialize port.cmode with
a value that is different from any supported cmode value.
We have to take care that we only init the ports cmode once
chip->info->num_ports is set.
v2:
- add small helper and init the number of actual ports only
Fixes: 364e9d7776a3 ("net: dsa: mv88e6xxx: Power on/off SERDES on cmode change")
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/mv88e6xxx/port.h')
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx/port.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/port.h b/drivers/net/dsa/mv88e6xxx/port.h index e583641de758..4aadf321edb7 100644 --- a/drivers/net/dsa/mv88e6xxx/port.h +++ b/drivers/net/dsa/mv88e6xxx/port.h @@ -52,6 +52,7 @@ #define MV88E6185_PORT_STS_CMODE_1000BASE_X 0x0005 #define MV88E6185_PORT_STS_CMODE_PHY 0x0006 #define MV88E6185_PORT_STS_CMODE_DISABLED 0x0007 +#define MV88E6XXX_PORT_STS_CMODE_INVALID 0xff /* Offset 0x01: MAC (or PCS or Physical) Control Register */ #define MV88E6XXX_PORT_MAC_CTL 0x01 |