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| author |   Andrew Lunn <andrew@lunn.ch> | 2018-07-18 22:38:25 +0200 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2018-07-18 15:05:38 -0700 |
| commit | e2294a8bf52b8bf1bab52b4165ffdceec4a143e0 (patch) | |
| tree | ed566e3d41e9ae6358e3087083d391394d7db607 /drivers/net/dsa/mv88e6xxx/ptp.h | |
| parent | net: dsa: mv88e6xxx: Abstract supported PTP filters (diff) | |
| download | linux-dev-e2294a8bf52b8bf1bab52b4165ffdceec4a143e0.tar.xz linux-dev-e2294a8bf52b8bf1bab52b4165ffdceec4a143e0.zip | |
net: dsa: mv88e6xxx: Add hwtimestamp support for the 6165
The 6165 family supports a more restricted version of hardware time
stamps. Only L2 PTP is supported. All ports have to use the same
EtherType, and transport spec configuration. PTP can only be
enabled/disabled globally, not per port.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/mv88e6xxx/ptp.h')
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx/ptp.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/ptp.h b/drivers/net/dsa/mv88e6xxx/ptp.h index 979eecc8ae01..747f90bb9393 100644 --- a/drivers/net/dsa/mv88e6xxx/ptp.h +++ b/drivers/net/dsa/mv88e6xxx/ptp.h @@ -81,6 +81,7 @@ /* Offset 0x00: Ether Type */ #define MV88E6XXX_PTP_GC_ETYPE 0x00 +/* 6165 Global Control Registers */ /* Offset 0x01: Message ID */ #define MV88E6XXX_PTP_GC_MESSAGE_ID 0x01 @@ -105,6 +106,40 @@ #define MV88E6XXX_PTP_GC_TIME_LO 0x09 #define MV88E6XXX_PTP_GC_TIME_HI 0x0A +/* 6165 Per Port Registers */ +/* Offset 0: Arrival Time 0 Status */ +#define MV88E6165_PORT_PTP_ARR0_STS 0x00 + +/* Offset 0x01/0x02: PTP Arrival 0 Time */ +#define MV88E6165_PORT_PTP_ARR0_TIME_LO 0x01 +#define MV88E6165_PORT_PTP_ARR0_TIME_HI 0x02 + +/* Offset 0x03: PTP Arrival 0 Sequence ID */ +#define MV88E6165_PORT_PTP_ARR0_SEQID 0x03 + +/* Offset 0x04: PTP Arrival 1 Status */ +#define MV88E6165_PORT_PTP_ARR1_STS 0x04 + +/* Offset 0x05/0x6E: PTP Arrival 1 Time */ +#define MV88E6165_PORT_PTP_ARR1_TIME_LO 0x05 +#define MV88E6165_PORT_PTP_ARR1_TIME_HI 0x06 + +/* Offset 0x07: PTP Arrival 1 Sequence ID */ +#define MV88E6165_PORT_PTP_ARR1_SEQID 0x07 + +/* Offset 0x08: PTP Departure Status */ +#define MV88E6165_PORT_PTP_DEP_STS 0x08 + +/* Offset 0x09/0x0a: PTP Deperture Time */ +#define MV88E6165_PORT_PTP_DEP_TIME_LO 0x09 +#define MV88E6165_PORT_PTP_DEP_TIME_HI 0x0a + +/* Offset 0x0b: PTP Departure Sequence ID */ +#define MV88E6165_PORT_PTP_DEP_SEQID 0x0b + +/* Offset 0x0d: Port Status */ +#define MV88E6164_PORT_STATUS 0x0d + #ifdef CONFIG_NET_DSA_MV88E6XXX_PTP long mv88e6xxx_hwtstamp_work(struct ptp_clock_info *ptp); |