aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/dsa/qca8k.c
diff options
context:
space:
mode:
authorMichal Vokáč <vokac.m@gmail.com>2018-05-23 08:20:21 +0200
committerDavid S. Miller <davem@davemloft.net>2018-05-23 15:46:18 -0400
commit79a4ed4f0f93fc65e48a0fc5247ffa5645f7b0cc (patch)
treee97c99dd280177e6be2915af8889c15535f63e9b /drivers/net/dsa/qca8k.c
parentnet: dsa: qca8k: Enable RXMAC when bringing up a port (diff)
downloadlinux-dev-79a4ed4f0f93fc65e48a0fc5247ffa5645f7b0cc.tar.xz
linux-dev-79a4ed4f0f93fc65e48a0fc5247ffa5645f7b0cc.zip
net: dsa: qca8k: Force CPU port to its highest bandwidth
By default autonegotiation is enabled to configure MAC on all ports. For the CPU port autonegotiation can not be used so we need to set some sensible defaults manually. This patch forces the default setting of the CPU port to 1000Mbps/full duplex which is the chip maximum capability. Also correct size of the bit field used to configure link speed. Fixes: 6b93fb46480a ("net-next: dsa: add new driver for qca8xxx family") Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/qca8k.c')
-rw-r--r--drivers/net/dsa/qca8k.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index a32744e40baf..0d7e71528be5 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -490,6 +490,7 @@ qca8k_setup(struct dsa_switch *ds)
{
struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
int ret, i, phy_mode = -1;
+ u32 mask;
/* Make sure that port 0 is the cpu port */
if (!dsa_is_cpu_port(ds, 0)) {
@@ -515,7 +516,10 @@ qca8k_setup(struct dsa_switch *ds)
if (ret < 0)
return ret;
- /* Enable CPU Port */
+ /* Enable CPU Port, force it to maximum bandwidth and full-duplex */
+ mask = QCA8K_PORT_STATUS_SPEED_1000 | QCA8K_PORT_STATUS_TXFLOW |
+ QCA8K_PORT_STATUS_RXFLOW | QCA8K_PORT_STATUS_DUPLEX;
+ qca8k_write(priv, QCA8K_REG_PORT_STATUS(QCA8K_CPU_PORT), mask);
qca8k_reg_set(priv, QCA8K_REG_GLOBAL_FW_CTRL0,
QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN);
qca8k_port_set_status(priv, QCA8K_CPU_PORT, 1);