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author | Ansuel Smith <ansuelsmth@gmail.com> | 2021-10-14 00:39:13 +0200 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2021-10-15 11:06:37 +0100 |
commit | bbc4799e8bb6c397e3b3fec13de68e179f5db9ff (patch) | |
tree | c386e628cf0d7cb5d4693b8e2222cf3496d03bbd /drivers/net/dsa/qca8k.h | |
parent | dt-bindings: net: dsa: qca8k: Document qca,sgmii-enable-pll (diff) | |
download | linux-dev-bbc4799e8bb6c397e3b3fec13de68e179f5db9ff.tar.xz linux-dev-bbc4799e8bb6c397e3b3fec13de68e179f5db9ff.zip |
net: dsa: qca8k: add explicit SGMII PLL enable
Support enabling PLL on the SGMII CPU port. Some device require this
special configuration or no traffic is transmitted and the switch
doesn't work at all. A dedicated binding is added to the CPU node
port to apply the correct reg on mac config.
Fail to correctly configure sgmii with qca8327 switch and warn if pll is
used on qca8337 with a revision greater than 1.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/qca8k.h')
-rw-r--r-- | drivers/net/dsa/qca8k.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index 5eb0c890dfe4..77b1677edafa 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -266,6 +266,7 @@ struct qca8k_priv { u8 switch_revision; bool sgmii_rx_clk_falling_edge; bool sgmii_tx_clk_falling_edge; + bool sgmii_enable_pll; u8 rgmii_rx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */ u8 rgmii_tx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */ bool legacy_phy_port_mapping; |