diff options
| author |   Lendacky, Thomas <Thomas.Lendacky@amd.com> | 2016-11-10 17:10:17 -0600 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2016-11-13 00:56:26 -0500 |
| commit | 4c70dd8ac9ef88a1902b4d63dda987746a34ebc4 (patch) | |
| tree | 2a65dcd6bdaff64bddfd649161510ceeb704cff1 /drivers/net/ethernet/amd/xgbe/xgbe-pci.c | |
| parent | amd-xgbe: Allow for a greater number of Rx queues (diff) | |
| download | linux-dev-4c70dd8ac9ef88a1902b4d63dda987746a34ebc4.tar.xz linux-dev-4c70dd8ac9ef88a1902b4d63dda987746a34ebc4.zip | |
amd-xgbe: Add support for new DMA interrupt mode
The current per channel DMA interrupt support is based on an edge
triggered interrupt that is not maskable. This results in having to call
the disable_irq/enable_irq functions in order to prevent interrupts
during napi processing. The hardware now has a way to configure the per
channel DMA interrupt that will allow for masking the interrupt which
prevents calling disable_irq/enable_irq now. This patch makes use of
this support.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/amd/xgbe/xgbe-pci.c')
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe-pci.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c index fe77945bc49e..61eb6613b732 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c @@ -163,6 +163,7 @@ static int xgbe_config_msi(struct xgbe_prv_data *pdata) pdata->channel_irq_count = j; pdata->per_channel_irq = 1; + pdata->channel_irq_mode = XGBE_IRQ_MODE_LEVEL; } else { pdata->ecc_irq = pdata->pcidev->irq; pdata->i2c_irq = pdata->pcidev->irq; @@ -215,6 +216,7 @@ static int xgbe_config_msix(struct xgbe_prv_data *pdata) pdata->channel_irq_count = j; pdata->per_channel_irq = 1; + pdata->channel_irq_mode = XGBE_IRQ_MODE_LEVEL; if (netif_msg_probe(pdata)) dev_dbg(pdata->dev, "MSI-X interrupts enabled\n"); |