diff options
| author |   Nikita Danilov <ndanilov@marvell.com> | 2020-07-17 23:39:49 +0300 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2020-07-17 18:24:32 -0700 |
| commit | 23e500e88723f243c27e1b26c9d035d4cdd1b24a (patch) | |
| tree | 034345a9d180a7ea32c268f72e16b04e65dbcb03 /drivers/net/ethernet/aquantia/atlantic/aq_phy.c | |
| parent | nfc: nci: add missed destroy_workqueue in nci_register_device (diff) | |
| download | linux-dev-23e500e88723f243c27e1b26c9d035d4cdd1b24a.tar.xz linux-dev-23e500e88723f243c27e1b26c9d035d4cdd1b24a.zip | |
net: atlantic: disable PTP on AQC111, AQC112
This patch disables PTP on AQC111 and AQC112 due to a known HW issue,
which can cause datapath issues.
Ideally PTP block should have been disabled via PHY provisioning, but
unfortunately many units have been shipped with enabled PTP block.
Thus, we have to work around this in the driver.
Fixes: dbcd6806af420 ("net: aquantia: add support for Phy access")
Signed-off-by: Nikita Danilov <ndanilov@marvell.com>
Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/aquantia/atlantic/aq_phy.c')
| -rw-r--r-- | drivers/net/ethernet/aquantia/atlantic/aq_phy.c | 29 |
1 files changed, 27 insertions, 2 deletions
diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_phy.c b/drivers/net/ethernet/aquantia/atlantic/aq_phy.c index 51ae921e3e1f..949ac2351701 100644 --- a/drivers/net/ethernet/aquantia/atlantic/aq_phy.c +++ b/drivers/net/ethernet/aquantia/atlantic/aq_phy.c @@ -1,10 +1,14 @@ // SPDX-License-Identifier: GPL-2.0-only -/* aQuantia Corporation Network Driver - * Copyright (C) 2018-2019 aQuantia Corporation. All rights reserved +/* Atlantic Network Driver + * + * Copyright (C) 2018-2019 aQuantia Corporation + * Copyright (C) 2019-2020 Marvell International Ltd. */ #include "aq_phy.h" +#define HW_ATL_PTP_DISABLE_MSK BIT(10) + bool aq_mdio_busy_wait(struct aq_hw_s *aq_hw) { int err = 0; @@ -145,3 +149,24 @@ bool aq_phy_init(struct aq_hw_s *aq_hw) return true; } + +void aq_phy_disable_ptp(struct aq_hw_s *aq_hw) +{ + static const u16 ptp_registers[] = { + 0x031e, + 0x031d, + 0x031c, + 0x031b, + }; + u16 val; + int i; + + for (i = 0; i < ARRAY_SIZE(ptp_registers); i++) { + val = aq_phy_read_reg(aq_hw, MDIO_MMD_VEND1, + ptp_registers[i]); + + aq_phy_write_reg(aq_hw, MDIO_MMD_VEND1, + ptp_registers[i], + val & ~HW_ATL_PTP_DISABLE_MSK); + } +} |