diff options
| author |   Michael Chan <michael.chan@broadcom.com> | 2018-08-05 16:51:54 -0400 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2018-08-05 17:08:26 -0700 |
| commit | 97381a1831124c95801fbfaba8436b4abc7d03f5 (patch) | |
| tree | c748a0f8de5c9bca30d17183829051d7f867d405 /drivers/net/ethernet/broadcom/bnxt/bnxt.h | |
| parent | bnxt_en: Add BNXT_NEW_RM() macro. (diff) | |
| download | linux-dev-97381a1831124c95801fbfaba8436b4abc7d03f5.tar.xz linux-dev-97381a1831124c95801fbfaba8436b4abc7d03f5.zip | |
bnxt_en: Move firmware related flags to a new fw_cap field in struct bnxt.
The flags field is almost getting full. Move firmware capability flags
to a new fw_cap field to better organize these firmware flags.
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom/bnxt/bnxt.h')
| -rw-r--r-- | drivers/net/ethernet/broadcom/bnxt/bnxt.h | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.h b/drivers/net/ethernet/broadcom/bnxt/bnxt.h index 37dc896da9dc..ded2affd9ee8 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.h +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.h @@ -1144,7 +1144,6 @@ struct bnxt { atomic_t intr_sem; u32 flags; - #define BNXT_FLAG_DCB_ENABLED 0x1 #define BNXT_FLAG_VF 0x2 #define BNXT_FLAG_LRO 0x4 #ifdef CONFIG_INET @@ -1173,15 +1172,11 @@ struct bnxt { BNXT_FLAG_ROCEV2_CAP) #define BNXT_FLAG_NO_AGG_RINGS 0x20000 #define BNXT_FLAG_RX_PAGE_MODE 0x40000 - #define BNXT_FLAG_FW_LLDP_AGENT 0x80000 #define BNXT_FLAG_MULTI_HOST 0x100000 - #define BNXT_FLAG_SHORT_CMD 0x200000 #define BNXT_FLAG_DOUBLE_DB 0x400000 - #define BNXT_FLAG_FW_DCBX_AGENT 0x800000 #define BNXT_FLAG_CHIP_NITRO_A0 0x1000000 #define BNXT_FLAG_DIM 0x2000000 #define BNXT_FLAG_ROCE_MIRROR_CAP 0x4000000 - #define BNXT_FLAG_NEW_RM 0x8000000 #define BNXT_FLAG_PORT_STATS_EXT 0x10000000 #define BNXT_FLAG_ALL_CONFIG_FEATS (BNXT_FLAG_TPA | \ @@ -1195,7 +1190,6 @@ struct bnxt { #define BNXT_SINGLE_PF(bp) (BNXT_PF(bp) && !BNXT_NPAR(bp) && !BNXT_MH(bp)) #define BNXT_CHIP_TYPE_NITRO_A0(bp) ((bp)->flags & BNXT_FLAG_CHIP_NITRO_A0) #define BNXT_RX_PAGE_MODE(bp) ((bp)->flags & BNXT_FLAG_RX_PAGE_MODE) -#define BNXT_NEW_RM(bp) ((bp)->flags & BNXT_FLAG_NEW_RM) /* Chip class phase 4 and later */ #define BNXT_CHIP_P4_PLUS(bp) \ @@ -1291,6 +1285,13 @@ struct bnxt { u32 msg_enable; + u32 fw_cap; + #define BNXT_FW_CAP_SHORT_CMD 0x00000001 + #define BNXT_FW_CAP_LLDP_AGENT 0x00000002 + #define BNXT_FW_CAP_DCBX_AGENT 0x00000004 + #define BNXT_FW_CAP_NEW_RM 0x00000008 + +#define BNXT_NEW_RM(bp) ((bp)->fw_cap & BNXT_FW_CAP_NEW_RM) u32 hwrm_spec_code; u16 hwrm_cmd_seq; u32 hwrm_intr_seq_id; |