diff options
| author |   Arun Chandran <achandran@mvista.com> | 2015-03-01 11:38:02 +0530 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2015-03-01 23:05:23 -0500 |
| commit | 62f6924cb1543a10d05150d77f9a5e01e12c9ce1 (patch) | |
| tree | ebd3ecb7379f78e673eb207f6c26d5771836e7d9 /drivers/net/ethernet/cadence | |
| parent | Driver: Vmxnet3: Copy TCP header to mapped frame for IPv6 packets (diff) | |
| download | linux-dev-62f6924cb1543a10d05150d77f9a5e01e12c9ce1.tar.xz linux-dev-62f6924cb1543a10d05150d77f9a5e01e12c9ce1.zip | |
net: macb: Add on the fly CPU endianness detection
Program management descriptor's access mode according to the
dynamically detected CPU endianness.
Signed-off-by: Arun Chandran <achandran@mvista.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/cadence')
| -rw-r--r-- | drivers/net/ethernet/cadence/macb.c | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c index 05fb36da0cff..1fe8b946243a 100644 --- a/drivers/net/ethernet/cadence/macb.c +++ b/drivers/net/ethernet/cadence/macb.c @@ -1578,6 +1578,7 @@ static u32 macb_dbw(struct macb *bp) static void macb_configure_dma(struct macb *bp) { u32 dmacfg; + u32 tmp, ncr; if (macb_is_gem(bp)) { dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L); @@ -1586,10 +1587,23 @@ static void macb_configure_dma(struct macb *bp) dmacfg = GEM_BFINS(FBLDO, bp->dma_burst_length, dmacfg); dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L); dmacfg &= ~GEM_BIT(ENDIA_PKT); - /* Tell the chip to byteswap descriptors on big-endian hosts */ -#ifdef __BIG_ENDIAN - dmacfg |= GEM_BIT(ENDIA_DESC); -#endif + + /* Find the CPU endianness by using the loopback bit of net_ctrl + * register. save it first. When the CPU is in big endian we + * need to program swaped mode for management descriptor access. + */ + ncr = macb_readl(bp, NCR); + __raw_writel(MACB_BIT(LLB), bp->regs + MACB_NCR); + tmp = __raw_readl(bp->regs + MACB_NCR); + + if (tmp == MACB_BIT(LLB)) + dmacfg &= ~GEM_BIT(ENDIA_DESC); + else + dmacfg |= GEM_BIT(ENDIA_DESC); /* CPU in big endian */ + + /* Restore net_ctrl */ + macb_writel(bp, NCR, ncr); + if (bp->dev->features & NETIF_F_HW_CSUM) dmacfg |= GEM_BIT(TXCOEN); else |