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| author |   Tariq Toukan <tariqt@mellanox.com> | 2020-08-26 15:54:16 +0300 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2020-08-26 15:55:53 -0700 |
| commit | f468f21b7af0fa472ff8ff70f10b9b4995ef7eb3 (patch) | |
| tree | 28a881ee0878c42efa3e4eb0aa55b75000c2f6d2 /drivers/net/ethernet/chelsio | |
| parent | Merge branch 'Add-Ethernet-support-for-Intel-Keem-Bay-SoC' (diff) | |
| download | linux-dev-f468f21b7af0fa472ff8ff70f10b9b4995ef7eb3.tar.xz linux-dev-f468f21b7af0fa472ff8ff70f10b9b4995ef7eb3.zip | |
net: Take common prefetch code structure into a function
Many device drivers use the same prefetch code structure to
deal with small L1 cacheline size.
Take this code into a function and call it from the drivers.
Suggested-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Reviewed-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/chelsio')
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb3/sge.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb3/sge.c b/drivers/net/ethernet/chelsio/cxgb3/sge.c index 6dabbf1502c7..ee6188dea705 100644 --- a/drivers/net/ethernet/chelsio/cxgb3/sge.c +++ b/drivers/net/ethernet/chelsio/cxgb3/sge.c @@ -2372,10 +2372,7 @@ no_mem: if (fl->use_pages) { void *addr = fl->sdesc[fl->cidx].pg_chunk.va; - prefetch(addr); -#if L1_CACHE_BYTES < 128 - prefetch(addr + L1_CACHE_BYTES); -#endif + net_prefetch(addr); __refill_fl(adap, fl); if (lro > 0) { lro_add_page(adap, qs, fl, |