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author | Huazhong Tan <tanhuazhong@huawei.com> | 2021-05-14 11:25:09 +0800 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2021-05-14 15:07:33 -0700 |
commit | 796640778c26f3d99fde173bb7b1d726b5f0d816 (patch) | |
tree | d13f9583f86564eb5bf49d509d04ee3adb0c3b07 /drivers/net/ethernet/hisilicon/hns3/hnae3.h | |
parent | net: thunderx: Drop unnecessary NULL check after container_of (diff) | |
download | linux-dev-796640778c26f3d99fde173bb7b1d726b5f0d816.tar.xz linux-dev-796640778c26f3d99fde173bb7b1d726b5f0d816.zip |
net: hns3: support RXD advanced layout
Currently, the driver gets packet type by parsing the
L3_ID/L4_ID/OL3_ID/OL4_ID from RX descriptor, it's
time-consuming.
Now some new devices support RXD advanced layout, which combines
previous OL3_ID/OL4_ID to 8bit ptype field, so the driver gets
packet type by looking up only one table, and L3_ID/L4_ID become
reserved fields.
Considering compatibility, the firmware will report capability of
RXD advanced layout, the driver will identify and enable it by
default. This patch provides basic function: identify and enable
the RXD advanced layout, and refactor out hns3_rx_checksum() by
using ptype table to handle RX checksum if supported.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/hisilicon/hns3/hnae3.h')
-rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hnae3.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 1d2189047781..1d265c34700f 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -91,6 +91,7 @@ enum HNAE3_DEV_CAP_BITS { HNAE3_DEV_SUPPORT_STASH_B, HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B, HNAE3_DEV_SUPPORT_PAUSE_B, + HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, }; #define hnae3_dev_fd_supported(hdev) \ @@ -141,6 +142,9 @@ enum HNAE3_DEV_CAP_BITS { #define hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev) \ test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (ae_dev)->caps) +#define hnae3_ae_dev_rxd_adv_layout_supported(ae_dev) \ + test_bit(HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, (ae_dev)->caps) + #define ring_ptr_move_fw(ring, p) \ ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) #define ring_ptr_move_bw(ring, p) \ |