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authorDaode Huang <huangdaode@hisilicon.com>2016-07-01 17:34:06 +0800
committerDavid S. Miller <davem@davemloft.net>2016-07-01 16:56:51 -0400
commitd9fdb4ed00036514146497fd48b906f0e12b68f7 (patch)
treefaf2092638618cdbf62fb415b128de1a2ae7d0b9 /drivers/net/ethernet/hisilicon
parentMAINTAINERS: add maintainers for hns driver (diff)
downloadlinux-dev-d9fdb4ed00036514146497fd48b906f0e12b68f7.tar.xz
linux-dev-d9fdb4ed00036514146497fd48b906f0e12b68f7.zip
net: hns: fix code style about hns driver
This patch fixes code sytle of hns driver to make it simple. Signed-off-by: Daode Huang <huangdaode@hisilicon.com> Signed-off-by: Yisen Zhuang <Yisen.Zhuang@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/hisilicon')
-rw-r--r--drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c16
1 files changed, 7 insertions, 9 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c
index 8473287d4c8b..611b67b6f450 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c
@@ -253,10 +253,9 @@ static void hns_dsaf_ge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
reg_val_1 = 0x1 << port;
port_rst_off = dsaf_dev->mac_cb[port]->port_rst_off;
/* there is difference between V1 and V2 in register.*/
- if (AE_IS_VER1(dsaf_dev->dsaf_ver))
- reg_val_2 = 0x1041041 << port_rst_off;
- else
- reg_val_2 = 0x2082082 << port_rst_off;
+ reg_val_2 = AE_IS_VER1(dsaf_dev->dsaf_ver) ?
+ 0x1041041 : 0x2082082;
+ reg_val_2 <<= port_rst_off;
if (!dereset) {
dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ1_REG,
@@ -272,12 +271,11 @@ static void hns_dsaf_ge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
reg_val_1);
}
} else {
- reg_val_1 = 0x15540 << dsaf_dev->reset_offset;
+ reg_val_1 = 0x15540;
+ reg_val_2 = AE_IS_VER1(dsaf_dev->dsaf_ver) ? 0x100 : 0x40;
- if (AE_IS_VER1(dsaf_dev->dsaf_ver))
- reg_val_2 = 0x100 << dsaf_dev->reset_offset;
- else
- reg_val_2 = 0x40 << dsaf_dev->reset_offset;
+ reg_val_1 <<= dsaf_dev->reset_offset;
+ reg_val_2 <<= dsaf_dev->reset_offset;
if (!dereset) {
dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ1_REG,