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authorJacob Keller <jacob.e.keller@intel.com>2016-04-13 16:08:22 -0700
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2016-04-25 04:15:11 -0700
commitb4f47a483045a6e6b31be8ade76cdfef7091f18b (patch)
tree92232ac7d9c844a7bb65c15fb9c4b7cadae5a079 /drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c
parentixgbe: Add work around for empty SFP+ cage crosstalk (diff)
downloadlinux-dev-b4f47a483045a6e6b31be8ade76cdfef7091f18b.tar.xz
linux-dev-b4f47a483045a6e6b31be8ade76cdfef7091f18b.zip
ixgbe: use BIT() macro
Several areas of ixgbe were written before widespread usage of the BIT(n) macro. With the impending release of GCC 6 and its associated new warnings, some usages such as (1 << 31) have been noted within the ixgbe driver source. Fix these wholesale and prevent future issues by simply using BIT macro instead of hand coded bit shifts. Also fix a few shifts that are shifting values into place by using the 'u' prefix to indicate unsigned. It doesn't strictly matter in these cases because we're not shifting by too large a value, but these are all unsigned values and should be indicated as such. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c')
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c
index f8fb2acc2632..072ef3b5fc61 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c
@@ -186,7 +186,7 @@ void ixgbe_dcb_unpack_pfc(struct ixgbe_dcb_config *cfg, u8 *pfc_en)
for (*pfc_en = 0, tc = 0; tc < MAX_TRAFFIC_CLASS; tc++) {
if (tc_config[tc].dcb_pfc != pfc_disabled)
- *pfc_en |= 1 << tc;
+ *pfc_en |= BIT(tc);
}
}
@@ -232,7 +232,7 @@ void ixgbe_dcb_unpack_prio(struct ixgbe_dcb_config *cfg, int direction,
u8 ixgbe_dcb_get_tc_from_up(struct ixgbe_dcb_config *cfg, int direction, u8 up)
{
struct tc_configuration *tc_config = &cfg->tc_config[0];
- u8 prio_mask = 1 << up;
+ u8 prio_mask = BIT(up);
u8 tc = cfg->num_tcs.pg_tcs;
/* If tc is 0 then DCB is likely not enabled or supported */