diff options
| author |   John Fastabend <john.r.fastabend@intel.com> | 2011-09-21 14:44:10 +0000 |
|---|---|---|
| committer |   Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2011-10-06 03:24:10 -0700 |
| commit | 6b8456c0199c4dd35bb7a04ff299ab925699e390 (patch) | |
| tree | fd3e66106def234199f0b1f8d236e55784c0d050 /drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c | |
| parent | ixgbe: DCB X540 devices support max traffic class of 4 (diff) | |
| download | linux-dev-6b8456c0199c4dd35bb7a04ff299ab925699e390.tar.xz linux-dev-6b8456c0199c4dd35bb7a04ff299ab925699e390.zip | |
ixgbe: X540 devices RX PFC frames pause traffic even if disabled
Receiving PFC (priority flow control) frames while the feature
is off should not pause the traffic class. On the X540 devices
the traffic class react to frames if it was previously enabled
because the field is incorrectly cleared.
Signed-off-by: John Fastabend <john.r.fastabend@intel.com>
Tested-by: Ross Brattain <ross.b.brattain@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c')
| -rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c index 45fe71030455..32cd97bc794d 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c @@ -271,13 +271,23 @@ s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en, u8 *prio_tc) reg |= IXGBE_MFLCN_RPFCE | IXGBE_MFLCN_DPF; if (hw->mac.type == ixgbe_mac_X540) { - reg &= ~(IXGBE_MFLCN_RPFCE_MASK | 0x10); + reg &= ~IXGBE_MFLCN_RPFCE_MASK; reg |= pfc_en << IXGBE_MFLCN_RPFCE_SHIFT; } IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg); } else { + /* X540 devices have a RX bit that should be cleared + * if PFC is disabled on all TCs but PFC features is + * enabled. + */ + if (hw->mac.type == ixgbe_mac_X540) { + reg = IXGBE_READ_REG(hw, IXGBE_MFLCN); + reg &= ~IXGBE_MFLCN_RPFCE_MASK; + IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg); + } + for (i = 0; i < MAX_TRAFFIC_CLASS; i++) hw->mac.ops.fc_enable(hw, i); } |